參數(shù)資料
型號(hào)： CY7C1413BV18-250BZXI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： SRAM
英文描述： 2M X 18 QDR SRAM, 0.45 ns, PBGA165
封裝： 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, M0-216, FBGA-165
文件頁(yè)數(shù)： 24/30頁(yè)
文件大?。?/td> 726K
代理商： CY7C1413BV18-250BZXI
Document Number: 001-07037 Rev. *D
Revised June 16, 2008
Page 30 of 30
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress, IDT, NEC, Renesas, and Samsung. All product and company names mentioned in this document
are the trademarks of their respective holders.
CY7C1411BV18, CY7C1426BV18
CY7C1413BV18, CY7C1415BV18
Cypress Semiconductor Corporation, 2006-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used
for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use
as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support
systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
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Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
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Document History Page
Document Title: CY7C1411BV18/CY7C1426BV18/CY7C1413BV18/CY7C1415BV18, 36-Mbit QDR-II SRAM 4-Word
Burst Architecture
Document Number: 001-07037
REV.
ECN NO.
SUBMISSION
DATE
ORIG. OF
CHANGE
DESCRIPTION OF CHANGE
**
433267
See ECN
NXR
New Data Sheet
*A
462004
See ECN
NXR
Changed tTH and tTL from 40 ns to 20 ns, changed tTMSS, tTDIS, tCS, tTMSH, tTDIH,
tCH from 10 ns to 5 ns and changed tTDOV from 20 ns to 10 ns in TAP AC Switching
Characteristics table
Modified Power Up waveform
*B
850381
See ECN
VKN
Minor change: Moved datasheet to the web
*C
1523289
See ECN
VKN/AESA Converted from preliminary to final, Updated Logic Block diagram, Updated
IDD/ISB specs, Changed DLL minimum operating frequency from 80MHz to
120MHz, Changed tCYC max spec to 8.4ns, Modified footnotes 22 and 30
*D
2478647
See ECN
VKN/AESA Changed Ambient Temperature with Power Applied from “–10°C to +85°C” to
“–55°C to +125°C” in the “Maximum Ratings “ on page 20, Updated Power-up
sequence waveform and it’s description, Updated IDD/ISB specs, Added footnote
#21 related to IDD, Changed JTAG ID [31:29] from 001 to 000.
相關(guān)PDF資料
PDF描述
CY7C145-35JCR 8K X 9 DUAL-PORT SRAM, 35 ns, PQCC68
CY7C1472BV25-250BZXI 4M X 18 ZBT SRAM, 3 ns, PBGA165
CY7C164-15PC 16K x 4 Static RAM
CY7C164-25PC 16K x 4 Static RAM
CY7C164-15VC 16K x 4 Static RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1413JV18-200BZXI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 2Mx18 QDR-II BURST 4 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1413JV18-250BZI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 2Mx18 QDR-II Burst 4 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1413JV18-250BZXC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 36-Mbit QDR 靜態(tài)隨機(jī)存取存儲(chǔ)器 4-Word Burst RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1413JV18-250BZXI 制造商:Cypress Semiconductor 功能描述:
CY7C1413JV18-300BZC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 2Mx18 QDR II Burst 4 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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