參數(shù)資料
型號: CY7C1515AV18-250BZXI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 2M X 36 QDR SRAM, 0.45 ns, PBGA165
封裝: 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
文件頁數(shù): 4/31頁
文件大?。?/td> 774K
代理商: CY7C1515AV18-250BZXI
CY7C1511AV18, CY7C1526AV18
CY7C1513AV18, CY7C1515AV18
Document Number: 001-06985 Rev. *D
Page 12 of 31
Write Cycle Descriptions
The write cycle description table for CY7C1515AV18 follows. [2, 10]
BWS0
BWS1
BWS2
BWS3
K
Comments
LLLL
L–H
During the Data portion of a write sequence, all four bytes (D[35:0]) are written into
the device.
LLLL
L–H During the Data portion of a write sequence, all four bytes (D[35:0]) are written into
the device.
L
H
L–H
During the Data portion of a write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] remains unaltered.
L
H
L–H During the Data portion of a write sequence, only the lower byte (D[8:0]) is written
into the device. D[35:9] remains unaltered.
H
L
H
L–H
During the Data portion of a write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] remains unaltered.
H
L
H
L–H During the Data portion of a write sequence, only the byte (D[17:9]) is written into
the device. D[8:0] and D[35:18] remains unaltered.
H
L
H
L–H
During the Data portion of a write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] remains unaltered.
H
L
H
L–H During the Data portion of a write sequence, only the byte (D[26:18]) is written into
the device. D[17:0] and D[35:27] remains unaltered.
H
L
L–H
During the Data portion of a write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] remains unaltered.
H
L
L–H During the Data portion of a write sequence, only the byte (D[35:27]) is written into
the device. D[26:0] remains unaltered.
HHHH
L–H
No data is written into the device during this portion of a write operation.
HHHH
L–H No data is written into the device during this portion of a write operation.
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