參數(shù)資料
型號: DM9601E
廠商: Electronic Theatre Controls, Inc.
英文描述: USB Ethernet MAC Controller with Intergrated 10/100 PHY
中文描述: USB以太網(wǎng)MAC控制器與集成10/100網(wǎng)卡芯片
文件頁數(shù): 3/58頁
文件大?。?/td> 603K
代理商: DM9601E
DM9601
USB to Ethernet MAC Controller with Integrated 10/100 PHY
Final
Version: DM9601-DS-F01
June 22, 2002
3
11.3 PHY ID Identifier Register #1 (PHYID1) – 02.31
11.4 PHY Indentifier Register #2 (PHYID2)-03.......31
11.5 Auto-negotiation Advertisement Register
(ANAR)-04 .......................................................32
11.6 Auto-negotiation Link Partner Ability Register
(ANLPAR)-05...................................................33
11.7 Auto-negotiation Expansion Register (ANER) -
06.....................................................................34
11.8 DAVICOM Specified Configuration Register
(DSCR)-16.......................................................34
11.9 DAVICOM Specified Configuration and Status
Register (DSCSR) - 17....................................35
11.10 Base-T Configuration/Status (10BTCSR) - 18
.........................................................................37
12. Functional Description ......................................38
12.1 100Base-TX Operation...................................38
12.1.1 4B5B Encoder..............................................38
12.1.2 Scrambler.....................................................38
12.1.3 Parallel to Serial Converter..........................38
12.1.4 NRZ to NRZI Encoder..................................38
12.1.5 MLT-3 Converter..........................................38
12.1.6 MLT-Driver...................................................38
12.1.7 4B5B Code Group Table 1 ..........................39
12.2 100Base-TX Receiver.....................................40
12.2.1 Signal Detect ...............................................40
12.2.2 Adaptive Equalization ..................................40
12.2.3 MLT-3 to NRZI Decoder...............................40
12.2.4 Clock Recovery Module...............................40
12.2.5 NRZI to NRZ ................................................40
12.2.6 Serial to Parallel ..........................................40
12.2.7 Descrambler.................................................40
12.2.8 Code Group Alignment ................................41
12.2.9 4B5B Decoder..............................................41
12.3 10Base-T Operation........................................41
12.4 Collision Detection..........................................41
12.5 Carrier Sense..................................................41
12.6 Auto-Negotiation.............................................41
12.7 Power Reduced Mode ....................................42
12.8 Power Down Mode..........................................42
12.9 Reduced Transmit Power Mode .....................42
13. DC and AC Electrical Characteristics...............43
13.1 Absolute Maximum Rating (25
°
C)................43
13.2 Operating Conditions......................................43
13.3 DC Electrical Characteristics ..........................44
13.4 USB Transceiver Interface DC Specification ..44
13.5 AC Electrical Characteristics & Timing
Waveforms.......................................................45
13.5.1 TP Interface .................................................45
13.5.2 Oscillator/ Crystal Timing.............................45
13.5.3 USB Transceiver Interface AC Specification45
13.5.4 External MII Interface Transmit Timing........45
13.5.5 External MII Interface Receive Timing.........46
13.5.6 MII Management Interface Timing...............46
13.5.7 EEPROM Interface Timing ..........................47
14. Application Notes..............................................48
14.1 Network Interface Signal Routing ...................48
14.2 10Base-T/100Base-TX Application Figure 14-1
.........................................................................48
14.3 10Base-T/100Base-TX (Power Reduction
Application)
Figure 14-2................................49
14.4 USB1.1 Application Figure 14-3 ....................50
14.5 Power Decoupling Capacitors Figure 14-4.....51
14.6 Ground Plane Layout Figure 11-5 ..................52
14.7 Power Plane Partitioning Figure 11-6.............53
14.8 Magnetics Selection Guide Table 2................54
14.9 Crystal Selection Guide Figure 11-7...............54
15. Package Information.........................................55
15.1 LQFP 100L Outline Dimensions.....................55
16. Order Information..............................................56
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