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參數(shù)資料
| 型號： | DSM2150F5V-12T6 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DSM (Digital Signal Processor System Memory) for Analog Devices DSPs (3.3V Supply) |
| 中文描述： | 帝斯曼（數(shù)字信號處理器系統(tǒng)內(nèi)存）的ADI公司的DSP（3.3V電源） |
| 文件頁數(shù)： | 22/73頁 |
| 文件大?。?/td> | 1067K |
| 代理商： | DSM2150F5V-12T6 |
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DSM2150F5V
22/73
PROGRAMMING FLASH MEMORY
When the DSM2150F5V is configured for 8-bit op-
eration, Flash memory locations are programmed
in 8-bit bytes to even or odd addresses.
When the DSM2150F5V is configured for 16-bit
operation, Flash memory locations are pro-
grammed in 16-bit words to even addresses only.
However, some DSPs support the BHE (byte high
enable) signal on the DSM2150F5V CNTL2 input
or the WRL, WRH (Write Low Byte, Write High
Byte) signals on the CNTL0 and PD3 inputs. In
these cases, a DSP WRITE operation can be di-
rected to an individual byte (upper or lower) of a
byte-pair. These signals do not effect READ oper-
ations, only WRITEs. READs are always by 16-
bits from an even address.
BHE signal on CNT2 input.
See Table
8
. Even-
byte refers to locations with address A0 equal to
’
0,
’
and odd byte as locations with A0 equal to
’
1.
’
WRL and WRH signals on CNT0 and PD3 in-
puts.
See Table
9
. Even-byte refers to locations
with address A0 equal to
’
0,
’
and odd byte as loca-
tions with A0 equal to
’
1.
’
When a byte/word of Flash memory is pro-
grammed, individual bits are programmed to logic
’
0.
’
You cannot program a bit in Flash memory to
a logic
’
1
’
once it has been programmed to a logic
’
0.
’
A bit must be erased to logic
’
1,' and pro-
grammed to logic
’
0.
’
That means Flash memory
must be erased prior to being programmed. The
DSP may erase the entire Flash memory array all
at once or individual sector-by-sector, but not byte-
by-byte (or word-by-word for 16-bit mode). Howev-
er, the DSP may program Flash memory byte-by-
byte (or word-by-word for 16-bit mode).
The Flash memory requires the DSP to send an in-
struction sequence to program a byte or to erase
sectors
(see
Table
6., page 17
).
Once the DSP issues a Flash memory Program or
Erase instruction sequence, it must check for the
status bits for completion. The embedded algo-
rithms that are invoked inside the device provide
several ways give status to the DSP. Status may
be checked using any of three methods: Data Poll-
ing, Data Toggle, or Ready/Busy (pin PE4).
5., page 15
or
Table
Table 8. 16-Bit Data Bus with BHE
Table 9. 16-Bit Data Bus with WRH and WRL
BHE
A0
D15-D8
D7-D0
0
0
Odd Byte
Even Byte
0
1
Odd Byte
—
1
0
—
Even Byte
WRH
WRL
D15-D8
D7-D0
0
0
Odd Byte
Even Byte
0
1
Odd Byte
—
1
0
—
Even Byte
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSM2150F5V-12T6T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| DSM2180F3 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DSM (Digital Signal Processor System Memory) for analog devices ADSP-218X family (5 V supply) |
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| DSM2180F315K6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DSM (Digital Signal Processor System Memory) For Analog Devices ADSP-218X Family (3.3V Supply) |
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