參數(shù)資料
型號： DSM2150F5V-12T6
廠商： 意法半導體
元件分類： 數(shù)字信號處理
英文描述： DSM (Digital Signal Processor System Memory) for Analog Devices DSPs (3.3V Supply)
中文描述： 帝斯曼（數(shù)字信號處理器系統(tǒng)內存）的ADI公司的DSP（3.3V電源）
文件頁數(shù)： 69/73頁
文件大?。?/td> 1067K
代理商： DSM2150F5V-12T6
69/73
DSM2150F5V
APPENDIX B. CSIOP REGISTER BIT DEFINITIONS
Table 34. Data-In Registers
–
Ports A, B, C, D, E, G
Note: Bit Definitions (Read only registers):
Read Port pin status when Port is in MCU I/O Input Mode.
Table 35. Data-Out Registers
–
Ports A, B, C, D, E, G
Note: Bit Definitions:
Latched data for output to Port pin when pin is configured in MCU I/O Output Mode.
Table 36. Direction Registers
–
Ports A, B, C, D, E, G
Note: Bit Definitions:
Port pin <i>
0 = Port pin <i> is configured in Input Mode (default).
Port pin <i>
1 = Port pin <i> is configured in Output Mode.
Table 37. Drive Registers
–
Ports A, B, E, G
Note: Bit Definitions:
Port pin <i>
0 = Port pin <i> is configured for CMOS Output driver (default).
Port pin <i>
1 = Port pin <i> is configured for Open Drain output driver.
Table 38. Drive Registers
–
Port C
Note: Bit Definitions:
Port pin <i>
0 = Port pin <i> is configured for CMOS Output driver (default).
Port pin <i>
1 = Port pin <i> is configured in Slew Rate Mode.
Table 39. Enable-Out Registers
–
Ports A, B, C
Note: Bit Definitions (Read only registers):
Port pin <i>
0 = Port pin <i> is in tri-state driver (default).
Port pin <i>
1 = Port pin <i> is enabled.
Table 40. Input Macrocells
–
Ports A, B, C
Note: Bit Definitions (Read only registers):
Read Input Macrocell (IMC7-IMC0) status on Ports A, B and C.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port pin 7
Port pin 6
Port pin 5
Port pin 4
Port pin 3
Port pin 2
Port pin 1
Port pin 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port pin 7
Port pin 6
Port pin 5
Port pin 4
Port pin 3
Port pin 2
Port pin 1
Port pin 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port pin 7
Port pin 6
Port pin 5
Port pin 4
Port pin 3
Port pin 2
Port pin 1
Port pin 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port pin 7
Port pin 6
Port pin 5
Port pin 4
Port pin 3
Port pin 2
Port pin 1
Port pin 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port pin 7
Port pin 6
Port pin 5
Port pin 4
Port pin 3
Port pin 2
Port pin 1
Port pin 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port pin 7
Port pin 6
Port pin 5
Port pin 4
Port pin 3
Port pin 2
Port pin 1
Port pin 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
IMcell 7
IMcell 6
IMcell 5
IMcell 4
IMcell 3
IMcell 2
IMcell 1
IMcell 0
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