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參數(shù)資料
| 型號： | Embedded Pentium 266 |
| 廠商： | Intel Corp. |
| 英文描述： | Low-Power Embedded Pentium Processor with MMX Technology(低能量嵌入式帶MMX技術(shù)奔騰處理器) |
| 中文描述： | 低功耗嵌入式處理器奔騰MMX技術(shù)（低能量嵌入式帶MMX公司的技術(shù)奔騰處理器） |
| 文件頁數(shù)： | 14/62頁 |
| 文件大?。?/td> | 1130K |
| 代理商： | EMBEDDED PENTIUM 266 |
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Low-Power Embedded Pentium
Processor with MMX Technology
14
Advance Information Datasheet
3.0
Packaging Information
3.1
Differences from Desktop Processors
The following features have been eliminated in the low-power embedded Pentium processor with
MMX technology: Upgrade, Dual Processing (DP), and Master/Checker functional redundancy.
Table 1 lists the corresponding pins that exist on the Pentium processor with MMX technology but
have been removed on the low-power embedded Pentium processor with MMX technology.
Table 1. Signals Removed from the Low-Power Embedded Pentium
Processor
with MMX Technology
Signal
Function
ADSC#
Additional Address Status. This signal is mainly used for large or standalone L2
cache memory subsystem support required for high-performance desktop or
server models.
BRDYC#
Additional Burst Ready. This signal is mainly used for large or standalone L2
cache memory subsystem support required for high-performance desktop or
server models.
CPUTYP
CPU Type. This signal is used for dual processing systems.
D/P#
Dual/Primary processor identification. This signal is only used for an upgrade
processor.
FRCMC#
Functional Redundancy Checking. This signal is only used for error detection via
processor redundancy and requires two Pentium processors (master/checker).
PBGNT#
Private Bus Grant. This signal is only used for dual processing systems.
PBREQ#
Private Bus Request. This signal is used only for dual processing systems.
PHIT#
Private Hit. This signal is only used for dual processing systems.
PHITM#
Private Modified Hit. This signal is only used for dual processing systems.
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