參數(shù)資料
型號: EP9315-IBZ
廠商: Cirrus Logic Inc
文件頁數(shù): 64/106頁
文件大?。?/td> 0K
描述: IC ARM9 SOC ENH UNIV 352PBGA
標(biāo)準(zhǔn)包裝: 40
系列: EP9
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 200MHz
連通性: EBI/EMI,EIDE,以太網(wǎng),I²C,IrDA,鍵盤/觸摸屏,PCMCIA,SPI,UART/USART,USB
外圍設(shè)備: AC'97,DMA,I²S,LCD,LED,MaverickKey,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 352-BGA
包裝: 托盤
配用: 598-1144-ND - KIT DEVELOPMENT EP9315 ARM9
其它名稱: 598-1263
2-22
DS785UM1
Copyright 2007 Cirrus Logic
ARM920T Core and Advanced High-Speed Bus (AHB)
EP93xx User’s Guide
2
0x8008_0008
SMCBCR2
Bank config Register 2 (used to program characteristics of the
SRAM/ROM memory)
N
0x8008_000C
SMCBCR3
Bank config Register 3 (used to program characteristics of the
SRAM/ROM memory)
N
0x8008_0010 - 0x8008_0014
Reserved
0x8008_0018
SMCBCR6
Bank config Register 6 (used to program characteristics of the
SRAM/ROM memory)
N
0x8008_001C
SMCBCR7
Bank config Register 7 (used to program characteristics of the
SRAM/ROM memory)
N
0x8008_0020
PC1Attribute
PC1 Attribute Register
0x8008_0024
PC1Common
PC1 Common Register
0x8008_0028
PC1IO
PC1 IO Register
0x8008_002C
Reserved
0x8008_0030
PC2Attribute
PC2 Attribute Register
0x8008_0034
PC2Common
PC2 Common Register
0x8008_0038
PC2IO
PC2 IO Register
0x8008_003C
Reserved
0x8008_0040
PCMCIACtrl
PCMCIA Control register
0x8008_0044 - 0x8008_FFFC
Reserved
0x8009_xxxx
Boot ROM
Boot ROM Memory Locations
0x8009_0000
Boot ROM Start
N
0x8009_3FFF
Boot ROM End
N
0x800A_xxxx
IDE
IDE Control Registers
0x800A_0000
IDECtrl
IDE Control Register
N
0x800A_0004
IDECfg
IDE Configuration Register
N
0x800A_0008
IDEMDMAOp
IDE MDMA Operation Register
N
0x800A_000C
IDEUDMAOp
IDE UDMA Operation Register
N
0x800A_0010
IDEDataOut
IDE PIO Data Output Register
N
0x800A_0014
IDEDataIn
IDE PIO Data Input Register
N
0x800A_0018
IDEMDMADataOut
IDE MDMA Data Output Register
N
0x800A_001C
IDEMDMADataIn
IDE MDMA Data Input Register
N
0x800A_0020
IDEUDMADataOut
IDE UDMA Data Output Register
N
0x800A_0024
IDEUDMADataIn
IDE UDMA Data Input Register
N
0x800A_0028
IDEUDMASts
IDE UDMA Status Register
N
0x800A_002C
IDEUDMADebug
IDE UDMA Debug Register
N
0x800A_0030
IDEUDMAWrBufSts
IDE UDMA Write Buffer Status Register
N
0x800A_0034
IDEUDMARdBufSts
IDE UDMA Read Buffer Status Register
N
0x800B_xxxx
VIC1
Vectored Interrupt Controller 1 Registers
0x800B_0000
VIC1IRQStatus
IRQ status Register
N
0x800B_0004
VIC1FIQStatus
FIQ status Register
N
Table 2-8. Internal Register Map (Continued)
Address
Register Name
Register Description
SW
Lock
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