參數(shù)資料
型號(hào): EP9315-IBZ
廠商: Cirrus Logic Inc
文件頁(yè)數(shù): 86/106頁(yè)
文件大?。?/td> 0K
描述: IC ARM9 SOC ENH UNIV 352PBGA
標(biāo)準(zhǔn)包裝: 40
系列: EP9
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 200MHz
連通性: EBI/EMI,EIDE,以太網(wǎng),I²C,IrDA,鍵盤/觸摸屏,PCMCIA,SPI,UART/USART,USB
外圍設(shè)備: AC'97,DMA,I²S,LCD,LED,MaverickKey,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲(chǔ)器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 352-BGA
包裝: 托盤
配用: 598-1144-ND - KIT DEVELOPMENT EP9315 ARM9
其它名稱: 598-1263
3-10
DS785UM1
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
3
cfldrs
c3, [r2], #4
; c3 = *filter++;
cfmuls
c1, c2, c3
; c1 = c2 * c3;
cfadds
c0, c0, c1
; sum += c1;
subs
r12, r12, #4
; j -= 4;
bne
inner_loop
; branch if j != 0
sub
r0, r3
; data -= m * 4;
cfstrs
c0, [r0], #4
; *data++ = sum;
sub
r2, r3
; filter -= m * 4;
subs
r1, r1, #4
; n -= 4;
bne
outer_loop
; branch if n != 0
mov
pc, lr
; return to caller
3.3 DSPSC Register
Default:
0x0000_0000_0000_0000
Definition:
MaverickCrunch Status and Control Register. Accessed only via the
MaverickCrunch instruction set. All bits, including status bits, are both
readable and writable. This register should generally be written only using a
read-modify-write sequence.
Bit Descriptions:
RSVD:
Reserved. Unknown During Read.
INST:
Exception Instruction. Whenever an unmasked exception
occurs, these 32 bits are loaded with the instruction that
caused the exception. Hence, this contains the instruction
that caused the most recent unmasked exception.
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
INST
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
INST
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
DAID
HVID
RSVD
ISAT
UI
INT
AEXC
SAT[1:0]
FCC[1:0]
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
V
FWDEN
Invalid
Denorm
RM[1:0]
IXE
UFE
OFE
RSVD
IOE
IX
UF
OF
RSVD
IO
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