參數(shù)資料
型號(hào): EP9315-IBZ
廠商: Cirrus Logic Inc
文件頁數(shù): 90/106頁
文件大?。?/td> 0K
描述: IC ARM9 SOC ENH UNIV 352PBGA
標(biāo)準(zhǔn)包裝: 40
系列: EP9
核心處理器: ARM9
芯體尺寸: 16/32-位
速度: 200MHz
連通性: EBI/EMI,EIDE,以太網(wǎng),I²C,IrDA,鍵盤/觸摸屏,PCMCIA,SPI,UART/USART,USB
外圍設(shè)備: AC'97,DMA,I²S,LCD,LED,MaverickKey,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲(chǔ)器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 352-BGA
包裝: 托盤
配用: 598-1144-ND - KIT DEVELOPMENT EP9315 ARM9
其它名稱: 598-1263
3-14
DS785UM1
Copyright 2007 Cirrus Logic
MaverickCrunch Co-Processor
EP93xx User’s Guide
3
3.4 ARM Co-Processor Instruction Format
The ARM V4T architecture defines five ARM co-processor instructions:
CDP - Co-processor Data Processing
LDC - Load Co-processor
STC - Store Co-processor
MCR - Move to Co-processor Register from ARM Register
MRC - Move to ARM Register from Co-processor Register
The co-processor instruction assembler notation is found in the ARM programming manuals
or the Quick Reference Card. (For additional information, see Preface, “Reference
Documents” on page P-3) Formats for the above instructions and variants of these
instructions are detailed below.
CDP (Co-Processor Data Processing) Instruction Format
LDC (Load Co-Processor) Instruction Format
STC (Store Co-Processor) Instruction Format
MCR (Move to Co-Processor from ARM Register) Instruction Format
MRC (Move to ARM Register from Co-Processor) Instruction Format
31
28 27
24 23
20 19
16 15
12 11
8
7
5
4
3
0
cond
1110
opcode1
CRn
CRd
cp num
opcode2
0
CRm
31
28 27
25 24 23 22 21 20 19
16 15
12 11
8
7
0
cond
110
P
U
N
W
1
Rn
CRd
cp num
offset
31
28 27
25 24 23 22 21 20 19
16 15
12 11
8
7
0
cond
110
P
U
N
W
0
Rn
CRd
cp num
offset
31
28 27
24 23
21 20 19
16 15
12 11
8
7
5
4
3
0
cond
1110
opcode1
0
CRn
Rd
cp num
opcode2
1
CRm
31
28 27
24 23
21 20 19
16 15
12 11
8
7
5
4
3
0
cond
1110
opcode1
1
CRn
Rd
cp num
opcode2
1
CRm
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