3MaverickCrunch Co-Processor 3.1 Introduction Note" />
參數(shù)資料
型號： EP9315-IBZ
廠商： Cirrus Logic Inc
文件頁數(shù)： 76/106頁
文件大?。?/td> 0K
描述： IC ARM9 SOC ENH UNIV 352PBGA
標準包裝： 40
系列： EP9
核心處理器： ARM9
芯體尺寸： 16/32-位
速度： 200MHz
連通性： EBI/EMI，EIDE，以太網(wǎng)，I²C，IrDA，鍵盤/觸摸屏，PCMCIA，SPI，UART/USART，USB
外圍設(shè)備： AC'97，DMA，I²S，LCD，LED，MaverickKey，POR，PWM，WDT
輸入/輸出數(shù)： 16
程序存儲器類型： ROMless
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 1.65 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 352-BGA
包裝： 托盤
配用： 598-1144-ND - KIT DEVELOPMENT EP9315 ARM9
其它名稱： 598-1263
DS785UM1
3-1
Copyright 2007 Cirrus Logic
3
Chapter 3
3MaverickCrunch Co-Processor
3.1 Introduction
Note:This chapter applies only to the EP9302, EP9307, EP9312, and EP9315 processors.
The MaverickCrunch co-processor accelerates IEEE-754 floating point arithmetic and 32-bit
and 64-bit fixed point arithmetic operations. It provides an integer multiply-accumulate (MAC)
that is considerably faster than the native MAC implementation in the ARM920T. The
MaverickCrunch co-processor significantly accelerates the arithmetic processing required to
encode/decode digital audio formats.
The MaverickCrunch co-processor uses the standard ARM920T co-processor interface,
sharing its memory interface and instruction stream. All MaverickCrunch operations are
simply ARM920T co-processor instructions. The co-processor handles all internal inter-
instruction dependencies by using internal data forwarding and inserting wait states.
3.1.1 Features
Key features include:
IEEE-754 single and double precision floating point
32/64-bit integer
Add/multiply/compare
Integer Multiply-Accumulate (MAC) 32-bit input with 72-bit accumulate
Integer Shifts
Floating point to/from integer conversion
Sixteen 64-bit registers
Four 72-bit accumulators
3.1.2 Operational Overview
The MaverickCrunch co-processor is a true ARM920T co-processor. It communicates with
the ARM920T via the co-processor bus and shares the instruction stream and memory
interface of the ARM920T. It runs at the ARM920T core clock frequency (either FCLK or
BCLK).
The co-processor supports four primary data formats:
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