參數(shù)資料
型號(hào): EVAL-ADAU1381Z
廠商: Analog Devices Inc
文件頁數(shù): 59/84頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR ADAU1381
標(biāo)準(zhǔn)包裝: 1
主要目的: 音頻編解碼器
嵌入式:
已用 IC / 零件: ADAU1381
已供物品:
相關(guān)產(chǎn)品: ADAU1381BCBZ-RL7DKR-ND - IC AUDIO CODEC STEREO LN 30WLCSP
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ADAU1381
Rev. B | Page 62 of 84
Register 16410 (0x401A), Left ADC Attenuator
Bits[7:0], Left ADC Digital Attenuator
These bits control a 256-step, logarithmically spaced volume
control from 0 dB to 95.625 dB, in increments of 0.375 dB.
When a new value is entered into this register, the volume control
slews gradually to the new value, avoiding pops and clicks in the
process. The slew ramp is logarithmic, incrementing 0.375 dB
per audio frame.
Register 16411 (0x401B), Right ADC Attenuator
Bits[7:0], Right ADC Digital Attenuator
These bits control a 256-step, logarithmically spaced volume
control from 0 dB to 95.625 dB, in increments of 0.375 dB.
When a new value is entered into this register, the volume control
slews gradually to the new value, avoiding pops and clicks in the
process. The slew ramp is logarithmic, incrementing 0.375 dB
per audio frame.
Table 45. Left ADC Attenuator Register
Bits
Description
Default
[7:0]
Left ADC digital attenuator; attenuation is in increments of 0.375 dB with each step of slewing
00000000
00000000: 0 dB
00000001: 0.375 dB
00000010: 0.75 dB
11111110: 95.25 dB
11111111: 95.625 dB
Table 46. Right ADC Attenuator Register
Bits
Description
Default
[7:0]
Right ADC digital attenuator; attenuation is in increments of 0.375 dB with each step of slewing
00000000
00000000: 0 dB
00000001: 0.375 dB
00000010: 0.75 dB
11111110: 95.25 dB
11111111: 95.625 dB
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