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參數(shù)資料
| 型號(hào)： | FMS7401 |
| 廠商： | Fairchild Semiconductor Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Digital Power Controller |
| 中文描述： | 數(shù)字電源控制器 |
| 文件頁數(shù)： | 44/80頁 |
| 文件大?。?/td> | 1535K |
| 代理商： | FMS7401 |
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FMS7401/7401L
PRODUCT SPECIFICATION
44
REV. 1.0.2 6/23/04
details of the port configuration options. The port configuration and data registers can both be read from or written to. Reading
PORTGP returns the value of the port pins regardless of how the pins are configured. Since this device supports MIW, all input
ports have Schmitt triggers.
Upon power-up, the PORTGC and PORTGD registers are initialized to 0x00. However, the G0/T1HS1 and G5/T1HS2 pins
may be defaulted to the different I/O configurations defined by the default I/O configuration bits of the Initialization Register 4.
Refer to
Table 29
in the
Device Memory
section of the datasheet for details.
Table 20. I/O Register Bit Assignments
Table 21. I/O Configuration Options
1. Refer to
Table 30
of the
Device Memory
section of the datasheet for the detailed memory map.
2. Available only on the 14-pin package option.
3. The G0/T1HS1 and G5/T1HS2 pins on the FMS7401 have special high voltage outputs. Refer to
Figure 15
for details.
PORTGC, PORTGD, PORTGD Registers (addr. 0xB3, 0xB2, 0xB4)
Bit 7
G7
2
Bit 6
G6
2
Bit 5
G5
3
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
G0
3
G4
G3
G2
G1
PORTGC Bit
PORTGD Bit
Port Pin Configuration
0
0
High-impedance input (tri-state input)
0
1
Input with pull-up (weak one input)
1
0
Push-pull zero output
1
1
Push-pull one output
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