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參數(shù)資料
| 型號： | FMS7401 |
| 廠商： | Fairchild Semiconductor Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Digital Power Controller |
| 中文描述： | 數(shù)字電源控制器 |
| 文件頁數(shù)： | 49/80頁 |
| 文件大小： | 1535K |
| 代理商： | FMS7401 |
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PRODUCT SPECIFICATION
FMS7401/7401L
REV. 1.0.2 6/23/04
49
Carry/Borrow (C)
The carry flag is set if the arithmetic logic unit (ALU) performs a carry or borrows during an arithmetic operation and by its
special inherent instructions—set carry (SC), load carry (LDC) and invert carry (INVC). The rotate instructions—rotate right/
left through carry (RRC/RLC)—operate with and through the carry bit to facilitate multiple-word shift operations. The RC,
SC, INVC, LDC and STC (store carry) instructions facilitate direct bit manipulation using the carry flag.
Half Carry (H)
The half carry flag indicates whether an overflow has taken place on the boundary between the two nibbles in the accumulator.
It is primarily used for Binary Coded Decimal (BCD) arithmetic calculation. The RC and SC instructions facilitate direct bit
manipulation of the half carry flag.
Zero (Z)
The zero flag is set if the result of an arithmetic, logic, or data manipulation operation is zero. Otherwise, the zero flag is
cleared.
Negative (N)
The result from an arithmetic, logic, or data manipulation operation is negative if the MSB is one, therefore setting the negative
flag. Otherwise, the negative flag is cleared.
Global Interrupt Mask (G)
The global interrupt bit (G) is a global mask that disables all maskable interrupt sources. If G is cleared, interrupts can become
pending but the operation of the core continues uninterrupted (even if the individual interrupts are enabled). However, if G is
set when an interrupt becomes pending the core will be interrupted and execute the appropriate interrupt service routine.
After a reset, G is defaulted to zero and can only be set by a software instruction. When an interrupt is recognized, G is auto-
matically cleared after the program counter value is stacked and the interrupt vector addressing the interrupt service routine is
fetched. Once the interrupt is serviced, a return-from-interrupt (RETI) instruction is normally executed to restore the program
counter to the value before the interrupt occurred. G is the restored to one after the return from interrupt is executed. Although
G can be set within an interrupt service routine, “nesting” interrupts in this way should only be done when there is a clear
understanding of latency and of the arbitration mechanism.
Table 23. Interrupt Priority Sequence
Priority (5 highest, 1 lowest)
Interrupt
5
Software
(INTR)
4
MIW
(EDGEI)
3
Timer 0
(TMRI0)
2
PWM Timer 1
(TMRI1)
1
ADC
(ADCI)
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| FMS7401LEN | Digital Power Controller |
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| FMS7401LVN | Digital Power Controller |
| FMS7401LVN14 | Digital Power Controller |
| FMS7G10US60S | SWTCH ROLLER SPDT 20A SCRW TERM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FMS7401L | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Power Controller |
| FMS7401L_05 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Power Controller |
| FMS7401LA_ABA3026U WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| FMS7401LEM8X | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Power Controller |
| FMS7401LEMT8X | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Digital Power Controller |
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