參數(shù)資料
型號(hào): FUSB2805MLX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 2/49頁(yè)
文件大?。?/td> 0K
描述: TXRX USB2.0 HS OTG ULPI 32MLP
標(biāo)準(zhǔn)包裝: 1
系列: *
其它名稱: FUSB2805MLXFSDKR
2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FUSB2805 Rev. 1.0.3
10
F
USB2
8
0
5
USB2
.0
High
-S
pee
d
OTG
Tra
nsc
e
iv
e
rw
ith
UL
P
I
Inter
fac
e
ULPI Signals
D [7:0]
STP
NXT
DIR
TXCMD
RegWr
SuspendM
Data
Turn
Around
CLOCK
Low Power Mode Signals
tCS
tSTP
1
Note: The second STP pulse indicates the exit of low-power (suspend) mode
Figure 6. Entering Low-Power Mode
Exiting Low-Power Mode
If the FUSB2805 has been in suspend at least 2 s, the
link may signal the FUSB2805 to exit low-power mode
by asynchronously asserting STP. The FUSB2805
immediately starts to wake up its internal circuitry. Upon
meeting the ULPI timing requirements the FUSB2805
then de-asserts DIR, ensuring a minimum of 5 cycles of
CLOCK have been driven before de-asserting DIR and
setting SuspendM=1b (in Function Control Register).
The link de-asserts STP in the cycle following the de-
assertion of DIR. There is one cycle of data bus
turnaround provided after the assertion of DIR, during
which the value of D[7:0] is not valid. Upon completion
of the turnaround cycle the FUSB2805 begins driving
the signals as described in Table 1.
ULPI Signals
D [7:0]
STP
NXT
DIR
SuspendM
Turn
Around
PHY Output CLOCK
Synchronous Mode Signals
Low-Power Mode Signals
tWU
tCWU
tCD
Figure 7. Exiting Low-Power Mode when FUSB2805 Provides Output CLOCK
6-Pin Full-Speed / Low-Speed Serial Mode
This mode of operation is provided for links that contain
legacy FS/LS functionality and enables a cost-effective
upgrade path to HS functionality.
To enter 6-pin serial mode, the link controller sets the
6PIN_FSLS_SERIAL bit in the interface control register
to logic 1. To exit 6-pin serial mode, the link controller
asserts STP.
An INT signal is also provided to inform the link of USB
events. If the link requires CLOCK to be running during 6-
pin serial mode, the CLK_SUSPENDM register bit must
be set to logic 1b before entering 6-pin serial mode.
The FUSB2805 requires CLKIN to be kept running when
in 6-pin mode. In 6-pin serial mode, the data bus
assignments are changed to those described in Table
2. Examples of the signaling of data packets are shown
相關(guān)PDF資料
PDF描述
FXLA2203UMX TRANSLATOR LEVEL DUAL 24UMLP
GAL16V8D-15LJN SPLD 62.5MHZ EECMOS 20 PLCC
GAL18V10B-20LP IC GAL 10OUT MACROCELL 7.5NS 20
GAL22V10D-25LJ IC SPLD 3.3V 28-PLCC
GH65C11-C-PD OPTO ENCODER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FUSCA REF BOARD 制造商:TDK 功能描述:REFERENCE BOARD FUSCA 2.4GHZ
FUSCAREFBOARD 制造商:Antenova 功能描述:Reference Board Fusca 2.4GHz
FUSE 功能描述:保險(xiǎn)絲 Fuse, Fiber 20A 600V Lot Qty 5 RoHS:否 制造商:Littelfuse 產(chǎn)品:Surface Mount Fuses 電流額定值:0.5 A 電壓額定值:600 V 保險(xiǎn)絲類型:Fast Acting 保險(xiǎn)絲大小/組:Nano 尺寸:12.1 mm L x 4.5 mm W 安裝風(fēng)格: 端接類型:SMD/SMT 系列:485
FUSE 25A ATC 制造商:American Technical Ceramics Corp 功能描述: 制造商:ATC 功能描述:
FUSE KIT D 制造商:COOPER BUSSMANN 功能描述:BUSSMANN FUSE KIT