參數(shù)資料
型號: HY5PS12423LF
英文描述: 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
中文描述: 128Mx4 | 1.8 | 8K的| D43/D44/D54/D55 |的DDR II內(nèi)存- 512M
文件頁數(shù): 46/66頁
文件大?。?/td> 862K
代理商: HY5PS12423LF
Rev. 0.52/Nov. 02 46
HY5PS12423(L)F
HY5PS12823(L)F
HY5PS121623(L)F
Read Burst Interrupt Opeation
Read burst interrupt functions is only allowed on a burst of 8. Interrupting a burst of 4 is prohibited. Read burst of 8
can only be interrupted by another Read command. Read burst interruption by Write command or Precharge command
is prohibited. Read burst interrupt must occur exactly two clocks after previous Read command. Any other Read burst
interrupt timings are prohibited. Read burst interruption is allowed to any bank inside DRAM. Read burst with Auto
Precharge enabled is not allowed to be interrupted. Read burst interruption is allowed by a Read with Auto Precharge
command. All command timings are referenced to burst length set in the mode register. They are not referenced to
actual burst. For example, Minimum Read to Precharge timing is AL+BL/2 where BL is the burst length set in the mode
register and not the actual burst(which is shorter beacuse of interrupt).
tRCD=4CLKs, CAS Latency=4CLKs, Additive Latency=3CLKs BL=8
/CK
CK
Active
Bank A
Q0 Q1 Q2 Q3
Read
Bank A
Read latency = 7clks
Additive Latency = 3clks
CMD
DQS
DQ
Q0’ Q1’ Q2’ Q3’
Read
Bank A’
相關(guān)PDF資料
PDF描述
HY5PS12823F 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12823LF 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5P Current Transducers HY 5 to 25-P/SP1
HY5R256HC -|2.5V|8K|40|Direct RDRAM - 256M
HY5R288HC -|2.5V|8K|40|Direct RDRAM - 288M
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