參數(shù)資料
型號: HY5PS12423LF
英文描述: 128Mx4|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
中文描述: 128Mx4 | 1.8 | 8K的| D43/D44/D54/D55 |的DDR II內(nèi)存- 512M
文件頁數(shù): 54/66頁
文件大?。?/td> 862K
代理商: HY5PS12423LF
Rev. 0.52/Nov. 02 54
HY5PS12423(L)F
HY5PS12823(L)F
HY5PS121623(L)F
Auto Refresh
Auto refresh command executes refresh operation with internal address increment. Auto refresh command is issued by
activating CS, RAS, CAS and deactivating WE at the rising edge of clock. NOP cycle must be inserted during the entire
auto refresh cycle time defined by tRFC. On chip refresh counter is incremented during each refresh cycle. Auto
refresh command must be issued each time a refresh is required. The 512Mb DDR-II SDRAM requires auto refresh
cycles at an average periodic interval of 7.8 us (maximum) and support internal multi-row refresh operation, which
means one auto refresh command executes two internal refresh cycle during tRFC cycle. To allow for improved effi-
ciency in scheduling and switching between tasks, some flexibility in the absolute refresh interval is provided. But, a
maximum of eight auto refresh commands can be posted. Before entering Auto Refresh mode, all banks must be in a
precharge state and Auto refresh command can be issued after tRP period from precharge all command.
/CK
CK
Auto Refresh
CMD
PRE
NOP
Valid
~
~
tRP
tRFC
NOP
NOP
NOP
NOP
NOP
~
NOP
NOP
NOP
相關PDF資料
PDF描述
HY5PS12823F 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5PS12823LF 64Mx8|1.8V|8K|D43/D44/D54/D55|DDR II SDRAM - 512M
HY5P Current Transducers HY 5 to 25-P/SP1
HY5R256HC -|2.5V|8K|40|Direct RDRAM - 256M
HY5R288HC -|2.5V|8K|40|Direct RDRAM - 288M
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