參數(shù)資料
型號(hào)： HYB 39S256160CT
廠商： SIEMENS AG
英文描述： 256-Mbit(4banks × 4MBit × 16) Synchronous DRAM(256M(4列 × 4M位 × 16)同步動(dòng)態(tài)RAM)
中文描述： 256兆位（4banks ×的4Mb × 16）同步DRAM（256M（4列× 4分位× 16）同步動(dòng)態(tài)RAM）的
文件頁(yè)數(shù)： 1/41頁(yè)
文件大?。?/td> 327K
代理商： HYB 39S256160CT
INFINEON Technologies
1
1.00
HYB39S256400/800/160CT(L)
256MBit Synchronous DRAM
256 MBit Synchronous DRAM
The HYB39S256400/800/160CT(L) are four bank Synchronous DRAM’s organized as 4 banks x
16MBit x4, 4 banks x 8MBit x8 and 4 banks x 4Mbit x16 respectively. These synchronous devices
achieve high speed data transfer rates for CAS-latencies by employing a chip architecture that
prefetches multiple bits and then synchronizes the output data to a system clock. The chip is
fabricated with INFINEON’s advanced 0.17
μ
m 256MBit DRAM process technology.
The device is designed to comply with all industry standards set for synchronous DRAM products,
both electrically and mechanically. All of the control, address, data input and output circuits are
synchronized with the positive edge of an externally supplied clock.
Operating the four memory banks in an interleave fashion allows random access operation to occur
at higher rate than is possible with standard DRAMs. A sequential and gapless data rate of is
possible depending on burst length, CAS latency and speed grade of the device.
Auto Refresh (CBR) and Self Refresh operation are supported. These devices operates with a
single 3.3V +/- 0.3V power supply and are available in TSOPII packages.
High Performance:
Fully Synchronous to Positive Clock Edge
0 to 70
°
C operating temperature
Four Banks controlled by BA0 & BA1
Programmable CAS Latency: 2 & 3
Programmable Wrap Sequence: Sequential
or Interleave
Programmable Burst Length:
1, 2, 4, 8
-7.5
-8
-8A
Units
fCK
133
125
125
MHz
tCK3
7.5
8
8
ns
tAC3
5.4
6
6
ns
tCK2
10
10
12
ns
tAC2
6
6
6
ns
Multiple Burst Read with Single Write
Operation
Automatic
and
Controlled
Command
Data Mask for Read / Write control (x4, x8)
Data Mask for byte control (x16)
Auto Refresh (CBR) and Self Refresh
Power Down Mode
8192 refresh cycles / 64 ms (7,8
μ
s)
Random Column Address every CLK
( 1-N Rule)
Single 3.3V +/- 0.3V Power Supply
LVTTL Interface versions
Plastic Packages:
P-TSOPII-54 400mil width (x4, x8, x16)
-7.5 parts for PC133 3-3-3 operation
-8 parts for PC100 2-2-2 operation
-8A parts for PC100 3-2-2 operation
Precharge
相關(guān)PDF資料
PDF描述
HYB 39S64160AT 4M x 16 MBit Synchronous DRAM for High Speed Graphics Applications(64M位(4M x 16)同步動(dòng)態(tài)RAM（用于高速圖形場(chǎng)合）)
HYB 39S64160BT 4M x 16 MBit Synchronous DRAM for High Speed Graphics Applications(64M位(4列 × 1M位 × 16)同步動(dòng)態(tài)RAM（用于高速圖形場(chǎng)合）)
HYB 39S64400BT 64MBit Synchronous DRAM(64M位(4列 × 4M位 × 4)同步動(dòng)態(tài)RAM)
HYB 39S64800BT 64MBit Synchronous DRAM(64M位(4列 × 2M位 × 8)同步動(dòng)態(tài)RAM)
HYB 39S64XXX0BTL 64MBitSynchronous DRAM(64M位同步動(dòng)態(tài)RAM(低功耗版))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB39S256160CT-7.5 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x16 SDRAM
HYB39S256160CT-8 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:?256Mb (16M x 16) PC100 2-2-2?
HYB39S256160CT-8A 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x16 SDRAM
HYB39S256160CTL-7.5 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x16 SDRAM
HYB39S256160CTL-8 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:x16 SDRAM
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*