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參數(shù)資料
| 型號： | IDT5V9888PFGI8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 500 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封裝： | GREEN, TQFP-32 |
| 文件頁數(shù)： | 15/37頁 |
| 文件大小： | 354K |
| 代理商： | IDT5V9888PFGI8 |
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INDUSTRIALTEMPERATURERANGE
IDT5V9888
3.3V EEPROMPROGRAMMABLECLOCKGENERATOR
PROGRAMMING THE DEVICE
I2C and JTAG may be used to program the 5V9888. The I2C/JTAG pin selects the I2C when HIGH and JTAG when LOW. Note that the TRST pin needs
to be LOW for I2C mode.
Hardwired Parameters for the IDT5V9888
JTAGidentificationnumber=32'b0000_0000001110101100_00000110011_1
Device (slave) address = 7'b1101010
ID Byte for the 5V9888 = 8'b00010000
I2C PROGRAMMING
The 5v9888 is programmed through an I2C-Bus serial interface, and is an I2C slave device. The read and write transfer formats are supported. The first
byteofdataafterawriteframetothecorrectslaveaddressisinterpretedastheregisteraddress;thisaddressauto-incrementsaftereachbytewrittenorread.
The frame formats are shown below.
SDA
SCL
S
Start
Condition
Data Frame
Data is stable during
clock HIGH
Stop
Condition
P
SCL
SDA
MSB
LSB
R/W
7-bit slave address
R/W
0 - Slave will be written by master
1 - Slave will be read by master
The first byte transmitted by the Master is the Slave Address followed by the R/W bit.
The Slave acknowledges by sending a "1" bit.
ACK from Slave
11
01
0
Figure 1: Framing
Figure 2: First Byte Transmittetd on I2C Bus
Each frame starts with a "Start Condition" and ends with an "End Condition". These are both generated by the Master device.
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相關(guān)代理商/技術(shù)參數(shù) |
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| IDT5V9888TNLGI | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GEN PLL 500MHZ 28-VFQFP |
| IDT5V9888TNLGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GEN PLL 500MHZ 28VFQFPN |
| IDT5V9888TPFGI | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GEN PLL 500MHZ 32TQFP |
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| IDT5V9910A-2SOG | 功能描述:IC BUFFER ZD PLL SGL I/O 24-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ JR 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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