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參數(shù)資料
| 型號： | IDT5V9888PFGI8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 500 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封裝： | GREEN, TQFP-32 |
| 文件頁數(shù)： | 16/37頁 |
| 文件大小： | 354K |
| 代理商： | IDT5V9888PFGI8 |
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INDUSTRIALTEMPERATURERANGE
IDT5V9888
3.3V EEPROMPROGRAMMABLECLOCKGENERATOR
EXTERNAL I2C INTERFACE CONDITION
PROGWRITE
Writes can continue as long as a Stop condition is not sent and each byte will increment the register address.
PROGREAD
S
Address
R/W
ACK
Command Code
Register
Data
P
ACK
7-bits
0
1-bit
8-bits: xxxxxx00
1-bit
8-bits
1-bit
8-bits
1-bit
S
Address
R/W
ACK
Command Code
Register
P
ACK
7-bits
0
1-bit
8-bits: xxxxxx00
1-bit
8-bits
1-bit
ACK
8-bits
Data_1
1-bit
Sr
Address
R/W
ACK
ID Byte
NACK
7-bits
1
1-bit
8 bits
1-bit
P
ACK
8-bits
Data_2
1-bit
ACK
8-bits
Data_last
1-bit
Figure 3: Progwrite Command Frame
Note: If the expected read command is not from the next higher register to the previous read or write command, then set a known "read" register address
prior to a read operation by issuing the following command:
KEY:
From Master to Slave
From Master to Slave, but can be omitted if followed by the correct sequence
NormallydatatransferisterminatedbyaSTOPconditiongeneratedbytheMaster. However,iftheMasterstillwishestocommunicateonthebus,itcan
generate a repeated START condition, and address another Slave address without first generating a STOP condition.
From Slave to Master
SYMBOLS:
ACK - Acknowledge (SDA LOW)
NACK - Not Acknowledge (SDA HIGH)
Sr - Repeated Start Condition
S - START Condition
P - STOP Condition
1234
TheusercanignoretheSTOPconditionaboveandusearepeatedSTARTconditioninstead,straightaftertheslaveacknowledgementbit(i.e.,followedby
theProgreadcommand):
Note:Figure4babovebyitselfistheProgreadcommandformat. TheIDbyteforthe5V9888is10hex. Eachbyterecievedincrementstheregisteraddress.
Figure 4a: Prior to Progread Command Set Register Address
Figure 4b: Progread Command Frame
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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| IDT5V9910A-2SOG | 功能描述:IC BUFFER ZD PLL SGL I/O 24-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ JR 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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