參數(shù)資料
型號： IDT5V9888PFGI8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時鐘產(chǎn)生/分配
英文描述： 500 MHz, OTHER CLOCK GENERATOR, PQFP32
封裝： GREEN, TQFP-32
文件頁數(shù)： 32/37頁
文件大小： 354K
代理商： IDT5V9888PFGI8
4
INDUSTRIALTEMPERATURERANGE
IDT5V9888
3.3V EEPROMPROGRAMMABLECLOCKGENERATOR
PIN DESCRIPTION
PF32
NL28
Pin Name
Pin#
I/O
Type
Description
CLKIN
1
I
LVTTL
Input Clock
XTALIN/REFIN
4
I
LVTTL
CRYSTAL_IN - Reference crystal input or external reference clock input
XTALOUT
5
O
LVTTL
CRYSTAL_OUT-Referencecrystalfeedback
GIN0/SDAT/TDI
19
16
I
LVTTL(3)
Multi-purposeinputs. CanbeusedforFrequencyControl,SDAT(I2C),orTDI(JTAG).
GIN1/SCLK/TCK
20
17
I
LVTTL(3)
Multi-Purposeinputs. CanbeusedforFrequencyControl,SCLK(I2C),orTCK(JTAG).
GIN2/TMS
24
21
I
LVTTL(3)
Multi-Purpose inputs. Can be used for Frequency Control or TMS (JTAG).
WRITE ENABLE
27
24
I
LVTTL(3)
Write Enable pin. This pin must be pulled HIGH during normal operation. HIGH =
normal operation, LOW = Enable writing to internal EEPROM.
GIN3/TRST
25
22
I
LVTTL(3)
Multi-Purpose inputs. Can be used for Frequency Control or TRST (JTAG).
GIN4/CLK_SEL
21
18
I
LVTTL(3)
Multi-Purpose inputs. Can be used for Frequency Control or input clock selector.
SHUTDOWN/OE
28
23
I
LVTTL(3)
Enables/disablestheoutputsorpowersdownthechip.TheSPbit(0x1C)controlsthe
polarity of the signal to be either active HIGH or LOW. (Default is active HIGH.)
I2C/JTAG
22
19
I
3-level(2)
I2C (HIGH) or MFC Mode (MID) or JTAG Programming (LOW).
OUT1
6
O
LVTTL
Configurableclockoutput1.Canalsobeusedtobufferthereferenceclock.
OUT2
29
25
O
LVTTL
Configurableclockoutput2
OUT3
8
7
O
LVTTL
Configurableclockoutput3
OUT4
10
8
O
Adjustable(1)
Configurableclockoutput4,Single-EndedorDifferentialwhencombinedwithOUT4
OUT4
11
9
O
Adjustable(1)
Configurable complementary clock output 4, Single-Ended or Differential when
combinedwithOUT4
OUT5
15
13
O
Adjustable(1)
Configurableclockoutput5,Single-EndedorDifferentialwhencombinedwithOUT5
OUT5
16
14
O
Adjustable(1)
Configurable complementary clock output 5, Single-Ended or Differential when
combinedwithOUT5
OUT6
13
11
O
LVTTL
Configurableclockoutput6
GOUT0/TDO/LOSS_LOCK
31
27
O
LVTTL(3)
Multi-PurposeOutput.CanbeprogrammedtouseasPLLLOCKsignal,LOSS_LOCK
or TDO in JTAG mode.
GOUT1/LOSS_CLKIN
3
O
LVTTL
Multi-Purpose Output. Can be programmed to use as LOSS_CLKIN.
VDD
7,12,17,
10,15,20
3.3V Power Supply
23,26,32
28
GND
2,9,14,
2,12,26
Ground
18,30
NOTES:
1. Outputs are user programmable to drive single-ended 3.3V LVTTL, differential LVDS, or differential LVPECL interface levels.
2. 3-level inputs are static inputs and must be tied to VDD or GND or left floating. These inputs are internally biased to VDD/2. They are not hot-insertable or over voltage tolerant.
3. The JTAG (TDO, TMS, TCLK, TRST, and TDI) and I2C (SCLK and SDAT) signals share the same pins with GIN signals.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT5V9888TNLGI 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GEN PLL 500MHZ 28-VFQFP
IDT5V9888TNLGI8 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GEN PLL 500MHZ 28VFQFPN
IDT5V9888TPFGI 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GEN PLL 500MHZ 32TQFP
IDT5V9888TPFGI8 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GEN PLL 500MHZ 32TQFP
IDT5V9910A-2SOG 功能描述:IC BUFFER ZD PLL SGL I/O 24-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ JR 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT
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