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參數(shù)資料
| 型號(hào)： | IDT82V3355TFG8 |
| 廠(chǎng)商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 125/135頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PLL WAN SYNC ETH 64-TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,250 |
| 類(lèi)型： | 時(shí)鐘/頻率發(fā)生器，多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH，Stratum |
| 輸入： | CMOS，LVDS，PECL |
| 輸出： | CMOS，LVDS，PECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 622.08MHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-TQFP（10x10） |
| 包裝： | 帶卷 (TR) |
| 其它名稱(chēng)： | 82V3355TFG8 |
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9
May 19, 2009
IDT82V3355
2009 Integrated Device Technology, Inc.
DSC-7078/4
SYNCHRONOUS ETHERNET
WAN PLL
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
FEATURES
HIGHLIGHTS
The first single PLL chip:
Features 0.1 Hz to 560 Hz bandwidth
Provides node clock for ITU-T G.8261/G.8262 Synchronous
Ethernet
Exceeds GR-253-CORE (OC-12) and ITU-T G.813 (STM-16/
Option I) jitter generation requirements
Provides node clocks for Cellular and WLL base-station (GSM
and 3G networks)
Provides clocks for DSL access concentrators (DSLAM), espe-
cially for Japan TCM-ISDN network timing based ADSL equip-
ments
MAIN FEATURES
Provides an integrated single-chip solution for Synchronous Equip-
ment Timing Source, including Stratum 3, SMC, 4E and 4 clocks
Employs DPLL and APLL to feature excellent jitter performance
and minimize the number of the external components
Integrates T0 DPLL and T4 DPLL; T4 DPLL locks independently or
locks to T0 DPLL
Supports Forced or Automatic operating mode switch controlled by
an internal state machine; the primary operating modes are Free-
Run, Locked and Holdover
Supports programmable DPLL bandwidth (0.1 Hz to 560 Hz in 11
steps) and damping factor (1.2 to 20 in 5 steps)
Supports 1.1X10-5 ppm absolute holdover accuracy and 4.4X10-8
ppm instantaneous holdover accuracy
Supports PBO to minimize phase transients on T0 DPLL output to
be no more than 0.61 ns
Supports phase absorption when phase-time changes on T0
selected input clock are greater than a programmable limit over an
interval of less than 0.1 seconds
Supports programmable input-to-output phase offset adjustment
Limits the phase and frequency offset of the outputs
Supports manual and automatic selected input clock switch
Supports automatic hitless selected input clock switch on clock fail-
ure
Supports three types of input clock sources: recovered clock from
STM-N or OC-n, PDH network synchronization timing and external
synchronization reference timing
Provides three 2 kHz, 4 kHz or 8 kHz frame sync input signals, and
a 2 kHz and an 8 kHz frame sync output signals
Provides 5 input clocks whose frequency cover from 2 kHz to
622.08 MHz
Provides 2 output clocks whose frequency cover from 1 Hz to
622.08 MHz
Provides output clocks for BITS, GPS, 3G, GSM, etc.
Supports PECL/LVDS and CMOS input/output technologies
Supports master clock calibration
Supports Line Card application
Meets Telcordia GR-1244-CORE, GR-253-CORE, ITU-T G.812,
ITU-T G.813 and ITU-T G.783 criteria
OTHER FEATURES
Serial microprocessor interface mode
IEEE 1149.1 JTAG Boundary Scan
Single 3.3 V operation with 5 V tolerant CMOS I/Os
64-pin TQFP package, Green package options available
APPLICATIONS
BITS / SSU
SMC / SEC (SONET / SDH)
DWDM cross-connect and transmission equipments
Synchronous Ethernet equipments
Central Office Timing Source and Distribution
Core and access IP switches / routers
Gigabit and Terabit IP switches / routers
IP and ATM core switches and access equipments
Cellular and WLL base-station node clocks
Broadband and multi-service access equipments
Any other telecom equipments that need synchronous equipment
system timing
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| D38999/20WJ19SB | CONN RCPT 19POS WALL MNT W/SCKT |
| IDT82V3255TFG8 | IC PLL WAN SMC STRATUM 3 64-TQFP |
| CS3102A-14S-54S | CONN RCPT 6POS BOX MNT W/SCKT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82V3355TFGBLANK | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:SYNCHRONOUS ETHERNET WAN PLL |
| IDT82V3358 | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:SYNCHRONOUS ETHERNET WAN PLL |
| IDT82V3358EDG | 功能描述:IC PLL WAN SYNC ETHERNET 64TQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類(lèi)型:時(shí)鐘緩沖器/驅(qū)動(dòng)器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱(chēng):93786AFT |
| IDT82V3358EDG8 | 制造商:Integrated Device Technology Inc 功能描述:IC PLL WAN SYNC ETHERNET 64TQFP |
| IDT82V3380 | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:SYNCHRONOUS ETHERNET WAN PLL |
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