![](http://datasheet.mmic.net.cn/230000/IP101_datasheet_15585017/IP101_17.png)
IP101
7.0 Functional Description
IP101
10/100Mbps
integrates 100 Base-TX, 100 Base-FX and 10 Base-T
modules into a single chip. IP101 acts as an interface
between
physical signaling and Media Access
Controller (MAC).
IP101 has several major functions:
1.
PCS layer (Physical Coding Sub-Layer)
: This
function contains transmit, receive and carrier
sense functional circuitries.
2.
Management
interface
:
Interface (MII) or Reduced Management Interface
(RMII)
registers
contains
communication with other MAC.
3.
Auto-Negotiation
:
Communication
between 2 PHY transceivers. IP101 advertise its
own ability and also detects corresponding
operational mode from the other party, eventually
both sides will come to an agreement for their
optimized transmission mode.
IP101’s major features included:
1. Flow Control ability
2. LED configuration access
3. Operation modes for both full and half duplex
4. APS (Auto Power Saving) mode
5. Base Line Wander (BLW) compensation
6. Auto MDI/MDIX function
7. Interrupt function
8. Repeater Mode
Major Functional Block Description
The functional blocks diagram is referred to Figure 1:
1.
4B/5B encoder:
100 Base-X transmissions require
converting 4-bit nibble data into 5-bit wide data
code-word format. Transmitting data is packaged
by J/K codes at the start of packet and by T/R
codes at the end of packet in the 4B/5B block.
When transmit error has occurred during a
transmitting process, the H error code will be sent.
The idle code is sent between two packets.
2.
4B/5B Decoder:
The decoder performs the 5B/4B
decoding from the received code-groups. The 5 bits
IP101-DS-R0.02
Feb. 24, 2003
17 / 33
Copyright
2003, IC Plus Corp.
Confidential, All rights reserved.
Advanced, Specification subject to change without notice.
NOT APPROVED BY TECHNICAL DOCUMENT CONTROL
Ethernet
PHY
Transceiver
Media
Independent
information
for
conditions
(5B) data is decoded into four bits nibble data. The
decoded 4 bit (4B) data is then forwarded through
MII to the repeater, switch or MAC device. The SSD
is then converted into 4B 5 nibbles and the ESD
and IDLE Codes are replaced by 4B 0 nibbles data.
The decoded data is driven onto the corresponding
MII port or shared MII port. Receiving an invalid
code group will cause PHY to assert the MII RXER
signal.
3.
Scrambler/Descrambler:
Repetitive patterns exist
in 4B/5B encoded data which result in large RF
spectrum peaks and keep the system from being
approved by regulatory agencies. The peak in the
radiated
signal
is
reduced
scrambling the transmitted signal. Scrambler adds
a random generator to the data signal output. The
resulting signal is with fewer repetitive data
patterns.
The
scrambled
descrambled at the receiver by adding another
random generator to the output. The receiver’ s
random generator has the same function as the
transmitter’ s
random
operation is dictated by the 100Base-X and
TP_FDDI standards.
4.
NRZI/MLT-3(Manchester) Encoder and Decoder:
100 Base-TX Transmission requires to encode the
data into NRZ format and again converted into
MLT-3 signal, while 10 Base-T will convert into
Manchester form after NRZ coding. This helps to
remove the high frequency noise generated by the
twisted pair cables. At receiving end, the coding is
reversed from MLT-3 (Manchester) signal back to
NRZ format.
5.
Clock Recovery:
The receiver circuit recovers
data from the input stream by regenerating clocking
information embedded in the serial stream. The
clock recovery block extracts the RXCLK from the
transition of received
6.
DSP Engine:
This block includes Adaptive
equalizer and Base Line Wander correction
function.
significantly
by
data
stream
is
generator.
Scrambler