參數(shù)資料
型號(hào)： IP101
英文描述： PHY 10/100M Single Chip Fast Ethernet Transceiver
中文描述： 單芯片物理層10/100M自適應(yīng)快速以太網(wǎng)收發(fā)器
文件頁(yè)數(shù)： 7/33頁(yè)
文件大?。?/td> 821K
代理商： IP101
IP101
5.0 Pin Descriptions
(continued)
Pin no.
IP101-DS-R0.02
Feb. 24, 2003
7 / 33
Copyright
2003, IC Plus Corp.
Confidential, All rights reserved.
Advanced, Specification subject to change without notice.
NOT APPROVED BY TECHNICAL DOCUMENT CONTROL
Label
Type
LED and PHY Address Configuration
Description
These five pins are latched into the IP101 during power up reset to configure PHY address [0:4] used for MII
management register interface. And then, in normal operation after initial reset, they are used as driving pins for
status indication LED. The driving polarity, active low or active high, is determined by each latched status of the
PHY address [4:0] during power-up reset. If latched status is high then it will be active low, and if latched status is
Low then it will be active high.
Moreover, IP101 provides 2 LED modes. If 2
LED mode is selected by pulling up
pin CRS, only 3 LEDs are needed for status indication. Default is first LED mode.
LED mode 1
LED0
LINK
LED1
FULL DUPLEX
LED2
10BT /ACT(blinking)
LED3
100BT /ACT(blinking)
LED4
COL
9
PHYAD0/
LED0
Status:
Mode1: Active when linked.
Mode2: Active when linked and blinking when transmitting or
receiving data.
10
PHYAD1/
LED1
Status:
Mode1: Active when in Full Duplex operation.
Mode2: Active when in Full Duplex operation and blinking when
collisions occur.
LED mode 2
LINK /ACT(blinking)
FULL DUPLEX /COL(blinking)
10BT
100BT
LI/O
PHY Address [0]
LI/O
PHY Address [1]
12
PHYAD2/
LED2
LI/O
PHY Address [2]
Status:
Mode1: Active when linked in 10Base-T mode, and blinking when
transmitting or receiving data.
Mode2: Active when linked in 10Base-T mode.
13
PHYAD3/
LED3
LI/O
PHY Address [3]
Status:
Mode1: Active when linked in 100Base-TX and blinking when
transmitting or receiving data.
Mode2: Active when linked in 100Base-TX mode.
15
PHYAD4/
LED4
LI/O
PHY Address [4]
Status:
Mode1: Active when collisions occur.
Mode2: Reserved.
Clock and Miscellaneous - Crystal Input/Output Pins
47
X2
O
25MHz Crystal Output:
Connects to crystal to provide the
25MHz output. It must be left open when X1 is driven with an
external 25MHz oscillator. It must be left open when X1 is driven
with an external 25MHz oscillator or set to low with a pull down
resistor.
46
X1
I
25MHz Crystal Input:
Connects to crystal to provide the 25MHz
crystal input. If a 25MHz oscillator is used, connect X1 to the
oscillator’ s output. If X1 is set to low with a pull down resistor, a
50MHz clock could be applied to pin7 as clock source.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IP101ALF 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Single port 10/100 Fast Ethernet Transceiver
IP101ALF-DS-R01 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Single port 10/100 Fast Ethernet Transceiver
IP101ALF-DS-R02 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Single port 10/100 Fast Ethernet Transceiver
IP101ALF-DS-R03 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Single port 10/100 Fast Ethernet Transceiver
IP101ALF-DS-R04 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Single port 10/100 Fast Ethernet Transceiver
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