
IP101
5.0 Pin Descriptions
(continued)
Pin no.
IP101-DS-R0.02
Feb. 24, 2003
5 / 33
Copyright
2003, IC Plus Corp.
Confidential, All rights reserved.
Advanced, Specification subject to change without notice.
NOT APPROVED BY TECHNICAL DOCUMENT CONTROL
Label
Type
Description
MII and PCS Interface – Media Independent Interface (MII) Pins
24
RX_ER/
FIBMOD
O/LI
(PD)
Receive error:
This pin outputs a high status when errors
occurred in the decoded data in the transmission.
Fiber Mode:
During power on reset, this pin status is latched to
determine at which media mode to operate:
1: Fiber mode
0: UTP mode
An internal weak pull low resistor sets this to the default of UTP
mode. It is possible to use an external 5.1K
pull high resistor to
enable fiber mode.
After power on, the pin operates as the Receive Error pin.
1
COL/RMII
O/LI
(PD)
Collision Detected:
When this pin outputs a high status signal it
means collision is detected.
RMII Mode:
During power on reset, this pin status is latched and
arranged with MII/SNIB (pin44) to determine MAC interface
RMII MII/SNIB
1 X RMII Interface
0 1 MII Interface
0 0 SNII Interface
(
Notice:
This pin is pulled down internally)
23
CRS/LEDMOD
O
(PD)
Carrier Sense:
When signal output from this pin is high indicates
the transmission is in process and at low status means the line is
in idle state.
LEDMOD:
During power on reset, this pin status is latched to
determine at which LED mode to operate, please refer to the LED
pins description.
(
Notice:
This pin is pulled down internally)
RMII (Reduced MII)
7
REF_CLK
I
Reference Clock:
This pin is an input pin operates as RMII
reference clock (REF_CLK) under RMII mode. 25MHz Crystal
Input and Output, X1 & X2, should be disconnected when
REF_CLK is used as the clock source of IP108.
2
TX_EN
I
(PD)
Transmit Enable:
For MAC to indicate transmit operation
5,6
TXD[1:0]
I
Transmit two-bit Data
24
RX_ER
I/O
Receive Error
22
CRS_DV
O
Carrier Sense and Receive Data Valid
20, 21
RXD[1:0]
O
Received two-bit Data