參數(shù)資料
型號： ISP1362
廠商： NXP Semiconductors N.V.
英文描述： Single-chip Universal Serial Bus On-The-Go controller
中文描述： 單芯片通用串行總線和On - The - Go控制器
文件頁數(shù)： 107/150頁
文件大?。?/td> 647K
代理商： ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
107 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
The HCD is
fi
rst required to initialize the HcTransferCounter register with the byte
count to be transferred and check the HcBufferStatus register. The HCD then sends
the command (44H for reading from the ATL buffer, and C4H for writing to the ATL
buffer) to the HC through the I/O port of the microprocessor. After the command is
sent, the HCD starts reading data from the ATL buffer or writing data to the ATL
buffer. While the HCD is accessing the buffer, the buffer pointer of ATL also increases
automatically. When the pointer has reached the initialized byte count of the
HcTransferCounter register, the HC sets the AllEOTInterrupt bit of the Hc
μ
PInterrupt
register to logic 1 and updates the HcBufferStatus register.
15.9.3
HcATLBlkSize register (R/W: 54H/D4H)
The ISP1362 partitions the ATL buffer into several equal sized blocks so that the HC
can skip the current PTD and proceed to process the next PTD easily. The block size
of the ATL buffer must be speci
fi
ed in this register and must be a multiple of 8 bytes.
The bit allocation of the HcATLBlkSize register is given in
Table 96
.
Code (Hex): 54
—
read
Code (Hex): D4
—
write
15.9.4
HcATLPTDDoneMap register (R: 1BH)
This is a 32-bit register. The bit description of the register is given in
Table 98
. Every
bit of the register represents the processing status of a PTD. Bit 0 of the register
represents the
fi
rst PTD stored in the ATL buffer, bit 1 represents the second PTD
stored in the buffer, and so on. The register is immediately updated after the
completion of each ATL PTD processing. It is cleared upon reading by the HCD. Bits
that are set representing its corresponding PTDs have been processed by the HC
and ACK token has been received from the device.
Code (Hex): 1B
—
read only
Table 96:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcATLBlkSize register: bit allocation
15
14
13
12
11
10
9
BlockSize[9:8]
0
R/W
1
8
reserved
-
-
7
-
-
6
-
-
5
-
-
4
BlockSize[7:0]
0
R/W
-
-
3
-
-
2
0
R/W
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 97:
Bit
15 to 10
9 to 0
HcATLBlkSize register: bit description
Symbol
Description
-
reserved
BlockSize[9:0] The block size of the ATL buffer.
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