參數(shù)資料
型號： ISP1362
廠商： NXP Semiconductors N.V.
英文描述： Single-chip Universal Serial Bus On-The-Go controller
中文描述： 單芯片通用串行總線和On - The - Go控制器
文件頁數(shù)： 48/150頁
文件大小： 647K
代理商： ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
48 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
external OC detection circuit, set AnalogOCEnable, bit 10 of register
HcHardwareCon
fi
guration, to logic 0. By default after reset this bit is set to logic 0.
Therefore, the HC Driver does not need to clear this bit.
Figure 24
shows how to use an external OC detection circuit.
12.8.3
OC detection circuit using internal charge pump in the OTG mode
When port 1 is operating in the OTG mode, you may choose to use the internal
charge pump to provide 5 V V
BUS
, or supply V
BUS
from an external source. In this
mode, the overcurrent condition is detected by a drop in V
BUS
that will be sensed by
the built-in comparator. The overcurrent condition causes a change in the
A_VBUS_VLD bit of the OtgStatus register. The software has to clear the
DRV_VBUS bit in the OtgControl register when it detects the A_VBUS_VLD bit
turning to logic 0.
(1) 100
μ
F for the host port or 4.7
μ
F for the OTG port.
Fig 24. Using external OC detection circuit.
004aaa149
H_OCn
VBUS
DM
OC
EN
VIN
VOUT
OC DETECTION
PSU_5V
DP
GND
chassis
chassis
1
2
3
4
5
6
C41(1)
DGND
C17
0.1
μ
F
DGND
DGND
FB2
H_PSWn
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相關代理商/技術參數(shù)
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