參數(shù)資料
型號(hào)： ISP1583ET1,118
廠商： ST-ERICSSON
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝： 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC, SOT969-1,TFBGA-64
文件頁(yè)數(shù)： 43/100頁(yè)
文件大?。?/td> 508K
代理商： ISP1583ET1,118
ISP1583_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 22 September 2008
46 of 99
NXP Semiconductors
ISP1583
Hi-Speed USB peripheral controller
In EOT-only mode, DIS_XFER_CNT must be set to logic 1. Although the DMA transfer
counter can still be programmed, it will not have any effect on the DMA transfer. The DMA
transfer will start once the DMA command is issued. Any of the following three ways will
terminate this DMA transfer:
Detecting an external EOT
Detecting an internal EOT (short packet on an OUT token)
Issuing a GDMA stop command
There are three interrupts programmable to differentiate the method of DMA termination:
bits INT_EOT, EXT_EOT and DMA_XFER_OK in the DMA Interrupt Reason register (see
MDMA (master) read/write (opcode = 06h/07h) — Generic DMA master mode.
Depending on the MODE[1:0] bits set in the DMA Conguration register, the DACK, DIOR
or DIOW signal strobes data. These signals are driven by the ISP1583.
In master mode, BURSTCOUNTER[12:0] in the DMA Burst Counter register,
DIS_XFER_CNT in the DMA Conguration register and the external EOT signal are not
applicable. The DMA transfer counter is always enabled and bit DMA_XFER_OK is set to
1 once the counter reaches 0.
MDMA read/write (opcode = 06h/07h) — Multi-word DMA mode for IDE transfers. The
specication of this mode can be obtained from Ref. 4 “AT Attachment with Packet
are used as data strobes, while DREQ and DACK serve as handshake signals.
Table 49.
Control bits for Generic DMA transfers
Control bits
Description
Reference
GDMA read/write
(opcode = 00h/01h)
MDMA (master) read/write
(opcode = 06h/07h)
DMA Conguration register
ATA_MODE
set to logic 0 (non-ATA
transfer)
set to logic 1 (ATA transfer)
DMA_MODE[1:0]
-
determines MDMA timing for
DIOR and DIOW strobes
DIS_XFER_CNT
disables use of DMA transfer
counter
disables use of DMA transfer
counter
MODE[1:0]
determines active read/write
data strobe signals
determines active data
strobe(s)
WIDTH
selects DMA bus width: 8 or
16 bits
selects DMA bus width: 8 or
16 bits
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1583ET1-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 SM FTPRINT RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1583ET1TM 制造商:STMicroelectronics 功能描述:
ISP1583ET2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB peripheral controller
ISP1583ET2,518 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1583ET2-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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