參數(shù)資料
型號(hào)： ISP1583ET1,118
廠商： ST-ERICSSON
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝： 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC, SOT969-1,TFBGA-64
文件頁(yè)數(shù)： 79/100頁(yè)
文件大?。?/td> 508K
代理商： ISP1583ET1,118
ISP1583_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 22 September 2008
7 of 99
NXP Semiconductors
ISP1583
Hi-Speed USB peripheral controller
DACK
10
F1
E2
I/O
DMA acknowledge input or output (programmable
polarity); the signal direction depends on bit MASTER in
register DMA Hardware (see Table 59):
Input: DMA slave mode if bit MASTER = 0
Output: DMA master mode if bit MASTER = 1
When not in use, in the default setting, this pin must be
connected to VCC(I/O) through a 10 k resistor.
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
DIOR
11
G2
E3
I/O
DMA read strobe input or output (programmable polarity);
the signal direction depends on bit MASTER in register
DMA Hardware (see Table 59):
Input: DMA slave mode if bit MASTER = 0
Output: DMA master mode if bit MASTER = 1
When not in use, in the default setting, this pin must be
connected to VCC(I/O) through a 10 k resistor.
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
DIOW
12
G1
F1
I/O
DMA write strobe input or output (programmable polarity);
the signal direction depends on bit MASTER in register
DMA Hardware (see Table 59):
Input: DMA slave mode if bit MASTER = 0
Output: DMA master mode if bit MASTER = 1
When not in use, in the default setting, this pin must be
connected to VCC(I/O) through a 10 k resistor.
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
DGND
13
H2
F2
-
digital ground
INTRQ
14
H1
G2
I
interrupt request input; from the ATA/ATAPI peripheral; use
a 10 k
resistor to pull down
input pad; TTL; 5 V tolerant
READY/
IORDY
15
J1
G1
I/O
Signal ready output — Used in generic processor mode:
LOW: the ISP1583 is processing a previous command
or data and is not ready for the next command or data
transfer
HIGH: the ISP1583 is ready for the next
microprocessor read or write
I/O ready input — Used in split bus mode to access
ATA/ATAPI peripherals (PIO mode only)
bidirectional pad; 10 ns slew-rate control; TTL; 5 V tolerant
INT
16
K1
H1
O
interrupt output; programmable polarity (active HIGH or
LOW) and signaling (edge or level triggered)
CMOS output; 8 mA drive
DA2[3]
17
J2
H2
O
address output to select the Task File register of an
ATA/ATAPI device; see Table 61
CMOS output; 8 mA drive
CS_N
18
K2
E4
I
chip selection input
input pad; TTL; 5 V tolerant
Table 3.
Pin description …continued
Symbol[1]
Pin
Type[2] Description
ISP1583BS ISP1583ET;
ISP1583ET2
ISP1583ET1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1583ET1-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 SM FTPRINT RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1583ET1TM 制造商:STMicroelectronics 功能描述:
ISP1583ET2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hi-Speed USB peripheral controller
ISP1583ET2,518 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
ISP1583ET2-T 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI USB 2.0 DEVICE RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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