參數(shù)資料
型號: KM416S1120D
廠商: Electronic Theatre Controls, Inc.
英文描述: 512K x 16bit x 2 Banks Synchronous DRAM LVTTL
中文描述: 為512k × 16位× 2銀行同步DRAM LVTTL
文件頁數(shù): 24/43頁
文件大?。?/td> 1131K
代理商: KM416S1120D
KM416S1120D
CMOS SDRAM
- 24
Rev. 1.4 (Jun. 1999)
FUNCTION TRUTH TABLE (TABLE 1)
Current
State
CS
RAS
CAS
WE
BA
ADDR
ACTION
Note
L
H
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
X
X
X
X
CA
RA
A
10
/AP
X
X
X
X
X
X
X
X
X
X
X
Row
Activating
Refreshing
ILLEGAL
NOP --> Row Active after t
RCD
NOP --> Row Active after t
RCD
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP --> Idle after t
RFC
NOP --> Idle after t
RFC
ILLEGAL
ILLEGAL
ILLEGAL
NOP --> Idle after 2 clocks
NOP --> Idle after 2 clocks
ILLEGAL
ILLEGAL
ILLEGAL
X
X
X
X
BA
BA
BA
X
X
X
X
X
X
X
X
X
X
X
L
X
H
H
H
L
L
L
X
H
H
L
L
X
H
H
H
L
L
X
H
H
L
H
H
L
X
H
L
H
L
X
H
H
L
X
X
X
H
L
X
H
L
X
X
X
X
X
X
X
H
L
X
X
2
2
2
2
Mode
Register
Accessing
*Note :
1. All entries assume the CKE was active (High) during the precharge clock and the current clock cycle.
2. Illegal to bank in specified state ; Function may be Iegal in the bank indicated by BA, depending on the
state of that bank.
3. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
4. NOP to bank precharging or in idle state. May precharge bank indicated by BA (and A
10
/AP).
5. Illegal if any bank is not idle.
Abbreviations : RA = Row Address BA = Bank Address
NOP = No Operation Command CA = Column Address AP = Auto Precharge
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