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參數(shù)資料
型號： KMC8610VT1333JB
廠商： Freescale Semiconductor
文件頁數(shù)： 20/96頁
文件大?。?/td> 0K
描述： IC HOST PROCESS 1333MHZ 783-PBGA
標準包裝： 1
系列： MPC86xx
處理器類型： 32-位 MPC86xx PowerPC
速度： 1.333GHz
電壓： 1.025V
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
Electrical Characteristics
MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
27
Table 17 provides the DDR capacitance when GVDD (typ)=2.5 V.
Table 18 provides the current draw characteristics for MVREF.
2.6.2
DDR SDRAM AC Electrical Characteristics
This section provides the AC electrical characteristics for the DDR/DDR2 SDRAM interface.
2.6.2.1
DDR SDRAM Input AC Timing Specifications
Table 19 provides the input AC timing specifications for the DDR2 SDRAM when GVDD(typ)=1.8 V.
Output high current (VOUT = 1.95 V)
IOH
–16.2
—
mA
Output low current (VOUT = 0.35 V)
IOL
16.2
—
mA
Notes:
1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.
2. MVREF is expected to be equal to 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver. Peak-to-peak
noise on MVREF may not exceed ±2% of the DC value.
3. VTT is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MVREF. This rail should track variations in the DC level of MVREF.
4. Output leakage is measured with all outputs disabled, 0 V
≤ V
OUT ≤ GVDD.
Table 17. DDR SDRAM Capacitance for GVDD (typ) = 2.5 V
Parameter/Condition
Symbol
Min
Max
Unit
Notes
Input/output capacitance: DQ, DQS
CIO
68
pF
1
Delta input/output capacitance: DQ, DQS
CDIO
—0.5
pF
1
Note:
1. This parameter is sampled. GVDD = 2.5 V ± 0.125 V, f = 1 MHz, TA =25°C, VOUT = GVDD/2, VOUT (peak-to-peak) = 0.2 V.
Table 18. Current Draw Characteristics for MVREF
Parameter/Condition
Symbol
Min
Max
Unit
Notes
Current draw for MVREF
IMVREF
—
500
μA1
Note:
1. The voltage regulator for MVREF must be able to supply up to 500 μA current.
Table 19. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface
At recommended operating conditions.
Parameter
Symbol
Min
Max
Unit
AC input low voltage
VIL
—MVREF – 0.25
V
AC input high voltage
VIH
MVREF + 0.25
—
V
Table 16. DDR SDRAM DC Electrical Characteristics for GVDD (typ) = 2.5 V (continued)
Parameter/Condition
Symbol
Min
Max
Unit
Notes
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