參數(shù)資料
型號(hào): KSZ8863MLL-EVAL
廠商: Micrel Inc
文件頁數(shù): 4/106頁
文件大小: 0K
描述: BOARD EVALUATION FOR KSZ8863MLL
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng) PHY
嵌入式:
已用 IC / 零件: KSZ8863MLL
已供物品:
相關(guān)產(chǎn)品: 576-3751-ND - IC ETHERNET SWITCH 3PORT 48-LQFP
576-3577-ND - IC ETHERNET SW 3PORT 48-LQFP
其它名稱: 576-3867
2006 Microchip Technology Inc.
DS39564C-page 99
PIC18FXX2
TABLE 9-9:
PORTE FUNCTIONS
TABLE 9-10:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name
Bit#
Buffer Type
Function
RE0/RD/AN5
bit0
ST/TTL(1)
Input/output port pin or read control input in Parallel Slave Port mode
or analog input:
RD
1
= Not a read operation
0
= Read operation. Reads PORTD register (if chip selected).
RE1/WR/AN6
bit1
ST/TTL(1)
Input/output port pin or write control input in Parallel Slave Port mode
or analog input:
WR
1
= Not a write operation
0
= Write operation. Writes PORTD register (if chip selected).
RE2/CS/AN7
bit2
ST/TTL(1)
Input/output port pin or chip select control input in Parallel Slave Port
mode or analog input:
CS
1
= Device is not selected
0
= Device is selected
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
All Other
RESETS
PORTE
—RE2
RE1
RE0
---- -000
LATE
LATE Data Output Register
---- -xxx
---- -uuu
TRISE
IBF
OBF
IBOV
PSPMODE
PORTE Data Direction bits
0000 -111
ADCON1
ADFM
ADCS2
PCFG3
PCFG2
PCFG1
PCFG0
00-- 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTE.
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