參數(shù)資料
型號(hào): KSZ8863MLL-EVAL
廠商: Micrel Inc
文件頁(yè)數(shù): 91/106頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR KSZ8863MLL
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng) PHY
嵌入式:
已用 IC / 零件: KSZ8863MLL
已供物品:
相關(guān)產(chǎn)品: 576-3751-ND - IC ETHERNET SWITCH 3PORT 48-LQFP
576-3577-ND - IC ETHERNET SW 3PORT 48-LQFP
其它名稱: 576-3867
PIC16C72 Series
DS39016A-page 84
Preliminary
1998 Microchip Technology Inc.
13.5
Timing Diagrams and Specications
FIGURE 13-2: EXTERNAL CLOCK TIMING
OSC1
CLKOUT
Q4
Q1
Q2
Q3
Q4
Q1
1
2
3
4
TABLE 13-3
EXTERNAL CLOCK TIMING REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
Fosc
External CLKIN Frequency
(Note 1)
DC
4
MHz
XT and RC osc mode
DC
4
MHz
HS osc mode (-04)
DC
10
MHz
HS osc mode (-10)
DC
20
MHz
HS osc mode (-20)
DC
200
kHz
LP osc mode
Oscillator Frequency
(Note 1)
DC
4
MHz
RC osc mode
0.1
4
MHz
XT osc mode
4
5
20
200
MHz
kHz
HS osc mode
LP osc mode
1
Tosc
External CLKIN Period
(Note 1)
250
ns
XT and RC osc mode
250
ns
HS osc mode (-04)
100
ns
HS osc mode (-10)
50
ns
HS osc mode (-20)
5
s
LP osc mode
Oscillator Period
(Note 1)
250
ns
RC osc mode
250
10,000
ns
XT osc mode
250
250
ns
HS osc mode (-04)
100
50
250
ns
HS osc mode (-10)
HS osc mode (-20)
5
s
LP osc mode
2
TCY
Instruction Cycle Time (Note 1)
200
DC
ns
TCY = 4/FOSC
3
TosL,
TosH
External Clock in (OSC1) High or
Low Time
100
ns
XT oscillator
2.5
s
LP oscillator
15
ns
HS oscillator
4
TosR,
TosF
External Clock in (OSC1) Rise or
Fall Time
25
ns
XT oscillator
50
ns
LP oscillator
15
ns
HS oscillator
Data in "Typ" column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1:
Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specied values are based on
characterization data for that particular oscillator type under standard operating conditions with the device executing
code. Exceeding these specied limits may result in an unstable oscillator operation and/or higher than expected current
consumption. All devices are tested to operate at "min." values with an external clock applied to the OSC1/CLKIN pin.
When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.
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