參數資料
型號: L64781
廠商: LSI CORP
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: PLASTIC, QFP-100
文件頁數: 149/164頁
文件大?。?/td> 2003K
代理商: L64781
Interrupt Mask Registers
5-15
Start_S
Start Pulse Synchro Interrupt
D0 R
This bit is set to 1 when the FFT start pulse
synchronization is established. This bit is reset only by a
hardware reset or by a microprocessor interrupt-register
read access.
The initial value of Start_S is 0.
5.3 Interrupt Mask Registers
The microprocessor can select between a polling or interrupt-driven
approach by appropriate programming of the
interrupt mask register.
When the bit in the interrupt mask register associated with the event bit
in the interrupt register is set HIGH, the interrupt for this event is enabled;
otherwise polling is selected.
5.3.1 Interrupt Mask Register 1 (0x02)
This is an 8-bit wide, read/write register.
VBER_IE
Viterbi Bit Error Rate Interrupt Mask
D7 R/W
The microprocessor sets this bit to enable an interrupt
when the VMDC2 period is reached.
The initial value of VBER_IE is 0.
Start_S
Denition
0
No Interrupt
1
Interrupt Raised
D7
D6
D5
D4
D3
D2
D1
D0
VBER_IE
Frm_LS_IE
Frm_S_IE
Freq_LS_IE
Freq_S_IE
Clk_LS_IE
Clk_S_IE
TPS_OK_
CHANGE_IE
VBER_IE
Denition
0
Interrupt Masked
1
Interrupt Enabled
l64781.book Page 15 Friday, January 19, 2001 1:28 PM
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