參數(shù)資料
型號: L64781
廠商: LSI CORP
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 29/164頁
文件大?。?/td> 2003K
代理商: L64781
5-54
Registers
SSA
FEC Synchronization States Acquisition
D[1:0] R/W
The user can set SSA to allow for three, four, ve, or six
properly identied synchronization words before the RS
decoder declares an “in-synchronization” of acquisition.
The initial value of SSA is 0b00.
5.6.3 FEC Parameters Registers 3, 4, and 5 (0x26, 0x27, 0x28)
These are three 8-bit wide, read/write registers.
VMDC2
Viterbi Max Data Bit Count
D[7:0] R/W
VMDC2 species the number of valid symbols, divided by
four, over which the number of symbol errors in the
Viterbi output data stream are counted, after
synchronization. The symbol error count is then displayed
as VBERC.
Example:
For example, a value of VMDC2 = 0x0000F0 in
Equation 5.10 species 960 data bits.
Equation 5.10
The initial value of the VMDC2 is
0b10011111110011010001 (0x09FCD1).
SSA
Denition
0
3 Sync Words Found
0
1
4 Sync Words Found
1
0
5 Sync Words Found
1
6 Sync Words Found
D7
D0
VMDC2_LSB
VMDC2_CSB
VMDC2_MSB
VMDC 2
Symbols
4
-------------------------
=
l64781.book Page 54 Friday, January 19, 2001 1:28 PM
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