參數(shù)資料
型號(hào): L64781
廠商: LSI CORP
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 8/164頁
文件大?。?/td> 2003K
代理商: L64781
Demod Parameters Registers
5-35
Positive polarity: The output frequency of the external
VCXO increases with increasing voltage from the
VCXOUT pin.
Negative polarity: The output frequency of the
external VCXO decreases with increasing voltage
from the pin VCXOUT of the L64781.
The initial value of TIM_POL is 1.
TIM_OFFSET_MSB
Start Pulse Phase Offset (MSB)
D[5:0] R/W
The start pulse is a periodic signal coming every
FFTMODE+GUARD 9-MHz cycles (in steady state). The
TIM_OFFSET bits adjust the phase of this signal in the
periodic window.
The initial value of TIM_OFFSET_MSB is 0.
5.5.10 Demod Parameters Registers 12 and 13 (0x12, 0x13)
These are two 8-bit wide, read/write registers.
TIM_CLK_INIT
Timing Initial VCXO Offset
D[7:0] R/W
In write mode, TIM_CLK_INIT species the initial value
for the integrator of the TIM block. The complete TIM CLK
INIT value has to be written for the TIM CLK INIT register
to take effect.
In read mode, TIM_CLK_INIT represents the value of the
TIM_CLK_OFFSET. The new TIM_CLK_OFFSET value
is read when the rst byte (LSB byte) is read and held
during the entire access.
The initial value of TIM_CLK_INIT is 0 in both registers.
TIM_POL
Denition
0
Negative Polarity
1
Positive Polarity
D7
D0
TIM_CLK_INIT_LSB
TIM_CLK_INIT_MSB
l64781.book Page 35 Friday, January 19, 2001 1:28 PM
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