參數(shù)資料
型號： LH28F040SUTD-Z4
廠商： Sharp Corporation
英文描述： 4M (512K 】 8) Flash Memory
中文描述： 4分（為512k】8）閃存
文件頁數(shù)： 25/32頁
文件大?。?/td> 247K
代理商： LH28F040SUTD-Z4
4M (512K × 8) Flash Memory
LH28F040SUTD-Z4
25
POWER-UP AND RESET TIMINGS
Figure 16. V
CC
Power-Up and RP
Reset Waveforms
28F040SUZ4-16
t
PHQV
t
WLPL
t
GLRS
t
ELRS
t
EHRS
t
GHRS
VALID
VALID
3.3 V OUTPUTS
3.3 V
3.0 V
t
AVQV
0 V
3.3 V
BE
(E)
(NOTE)
OE (G)
WE (W)
ADDRESS (A)
DATA (Q)
V
CC
(3.5 V)
V
CC
POWER UP
NOTE:
BE
X
means either BE
0
or BE
1
SYMBOL
PARAMETER
MIN.
MAX.
UNITS
NOTE
t
WLPL
WE Low to V
CC
at 3.0 V MIN.
5
μs
1
t
AVQV
Address Valid to Data Valid for
V
CC
= 3.3 V ± 0.3 V
150
ns
2
t
PHQV
WE High to Data Valid for V
CC
= 3.3 V ± 0.3 V
500
ns
2
t
ELRS
BE
0
and BE
1
Setup to WE Going Low
100
ns
t
GLRS
OE
Setup to WE Going Low
100
ns
t
EHRS
BE
0
and BE
1
Hold from WE Going High
100
ns
t
GHRS
OE
Hold from WE Going High
100
ns
NOTES:
BE
0
, BE
1
and OE
must be set high once after power-up. BE
0
and BE
1
must not be set low at the same time.
1. Chip reset is enabled when the low state of all BE
0
(or BE
1
), OE
and WE
exceeds 5 μs. Especially when you will
power on the chip, execute an above chip reset sequence for a protection from noise. All BE
0
(or BE
1
), OE
and WE
must not be low, except for the purpose of chip reset.
2. These values are shown for 3.3 V V
CC
operation. Refer to the AC Characteristics Read Only Operations also.
相關(guān)PDF資料
PDF描述
LH28F160BHE-TTL90 16M (x8/x16) Flash Memory
LH28F160BJE-BTL90 16M-BIT(1Mbit x16/2Mbit x8)Boot Block Flash MEMORY(16M位(1M位 x16/2M位 x8)Boot Block 閃速存儲器)
LH28F160BJE-TTL70 16M-BIT(1Mbit x16/2Mbit x8)Boot Block Flash MEMORY(16M位(1M位 x16/2M位 x8)Boot Block 閃速存儲器)
LH28F160BJHE-BTL70 16M-BIT(1Mbit x16/2Mbit x8)Boot Block Flash MEMORY(16M位(1M位 x16/2M位 x8)Boot Block 閃速存儲器)
LH28F160BJHE-TTL90 16M-BIT ( 1Mbit x16 / 2Mbit x8 )Boot Block Flash MEMORY(16M位( 1M位 x16 / 2M位 x8 )Boot Block 閃速存儲器)
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