參數(shù)資料
型號(hào)： LU3X31T-T64
英文描述： LU3X31T-T64 Single-Port 3 10/100 Ethernet Transceiver TX
中文描述： LU3X31T - T64單端口10/100以太網(wǎng)收發(fā)器3得克薩斯州
文件頁(yè)數(shù)： 17/44頁(yè)
文件大?。?/td> 580K
代理商： LU3X31T-T64
Lucent Technologies Inc.
17
Preliminary Data Sheet
July 2000
LU3X31T-T64 Single-Port 3 V
10/100 Ethernet Transceiver TX
Functional Description
(continued)
Operation Modes
The LU3X31T-T64 10Base-T module is capable of
operating in either half-duplex mode or full-duplex
mode. In half-duplex mode, the LU3X31T-T64 functions
as an IEEE 802.3 compliant transceiver with fully inte-
grated filtering. The COL pin signals collision, and the
CRS is asserted during transmit and receive. In full-
duplex mode, the LU3X31T-T64 can simultaneously
transmit and receive data.
Manchester Encoder/Decoder.
Data encoding and
transmission begins when the transmit enable input
(TXEN) goes high and continues as long as the trans-
ceiver is in good link state. Transmission ends when the
transmit enable input goes low. The last transition
occurs at the center of the bit cell if the last bit is a 1, or
at the boundary of the bit cell if the last bit is 0.
Decoding is accomplished by a differential input
receiver circuit and a phase-locked loop that separates
the Manchester-encoded data stream into clock signals
and NRZ data. The decoder detects the end of a frame
when no more midbit transitions are detected. Within
one and a half bit times after the last bit, carrier sense
is deasserted.
Transmit Driver and Receiver.
LU3X31T-T64 inte-
grates all the required signal conditioning functions in
its 10Base-T block such that external filters are not
required. Only an isolation transformer and impedance
matching resistors are needed for the 10Base-T trans-
mit and receive interface. The internal transmit filtering
ensures that all the harmonics in the transmit signal are
attenuated properly.
Smart Squelch.
The smart squelch circuit is responsi-
ble for determining when valid data is present on the
differential receive. The LU3X31T-T64 implements an
intelligent receive squelch on the TPRX
±
differential
inputs to ensure that impulse noise on the receive
inputs will not be mistaken for a valid signal. The
squelch circuitry employs a combination of amplitude
and timing measurements (as specified in the IEEE
802.3 10Base-T standard) to determine the validity of
data on the twisted-pair inputs.
The signal at the start of the packet is checked by the
analog squelch circuit, and any pulses not exceeding
the squelch level (either positive or negative, depend-
ing upon polarity) will be rejected. Once this first
squelch level is overcome correctly, the opposite
squelch level must then be exceeded within 150 ns.
Finally, the signal must exceed the original squelch
level within a further 150 ns to ensure that the input
waveform will not be rejected.
Only after all of these conditions have been satisfied
will a control signal be generated to indicate to the
remainder of the circuitry that valid data is present.
Valid data is considered to be present until the squelch
level has not been generated for a time longer than
200 ns, indicating end of packet. Once good data has
been detected, the squelch levels are reduced to mini-
mize the effect of noise causing premature end of
packet detection. The receive squelch threshold level
can be lowered for use in longer cable applications.
This is achieved by setting bit 11 or register address
1Ah.
Carrier Sense.
Carrier sense (CRS) is asserted due to
receive activity once valid data is detected via the
smart squelch function.
For 10 Mbits/s half-duplex operation, CRS is asserted
during either packet transmission or reception.
For 10 Mbits/s full-duplex operation, the CRS is
asserted only on receive activity. CRS is deasserted
following an end of packet.
Collision Detection.
For half-duplex operation, a
10Base-T collision is detected when the receive and
transmit channels are active simultaneously. Collisions
are reported by the COL signal. If the ENDEC is trans-
mitting when a collision is detected, the COL signal
remains set for the duration of the collision.
SQE Test Function.
Approximately 1
μ
s after the
transmission of each packet, a signal quality error
(SQE) signal of approximately 10 bit times is generated
(internally) to indicate successful transmission. SQE is
reported as a pulse on the COL signal. This function
can be disabled by setting bit 12 of register 1Ah. The
SQE test function is disabled in full-duplex mode.
Jabber Function.
The jabber function monitors the
LU3X31T-T64's output and disables the transmitter if it
attempts to transmit a longer than legal-sized packet. If
TXEN is high for greater than 24 ms, the 10Base-T
transmitter will be disabled and COL will go high.
Once disabled by the jabber function, the transmitter
stays disabled for the entire time that the TXEN signal
is asserted. This signal has to be deasserted for
approximately 256 ms (the unjab time) before the jab-
ber function re-enables the transmit outputs and de-
asserts COL signal.
The jabber function can be disabled by setting bit 10 of
register 1Ah.
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