參數(shù)資料
型號(hào): LU3X31T-T64
英文描述: LU3X31T-T64 Single-Port 3 10/100 Ethernet Transceiver TX
中文描述: LU3X31T - T64單端口10/100以太網(wǎng)收發(fā)器3得克薩斯州
文件頁數(shù): 2/44頁
文件大?。?/td> 580K
代理商: LU3X31T-T64
Table of Contents
Contents
Page
LU3X31T-T64 Single-Port 3 V
10/100 Ethernet Transceiver TX
Preliminary Data Sheet
July 2000
2
Lucent Technologies Inc.
Overview................................................................................................................................................................... 1
Features ................................................................................................................................................................... 1
Pin Descriptions........................................................................................................................................................ 6
Functional Description............................................................................................................................................ 10
Media Independent Interface (MII)...................................................................................................................... 10
100Base-X Module.............................................................................................................................................. 11
100Base-X Receiver ........................................................................................................................................... 14
100Base-X Link Monitor...................................................................................................................................... 15
100Base-TX Transceiver..................................................................................................................................... 16
10Base-T Module................................................................................................................................................ 16
Clock Synthesizer................................................................................................................................................ 18
Autonegotiation ................................................................................................................................................... 18
Reset Operation.................................................................................................................................................. 19
100Base-X PCS Configuration............................................................................................................................ 20
MII Registers .......................................................................................................................................................... 21
dc and ac Specifications......................................................................................................................................... 31
Absolute Maximum Ratings................................................................................................................................. 31
Clock Timing........................................................................................................................................................... 32
Outline Diagram...................................................................................................................................................... 43
64-Pin TQFP ....................................................................................................................................................... 43
Ordering Information............................................................................................................................................... 44
Tables
Page
Table 1. Twisted-Pair Magnetic Interface ................................................................................................................. 5
Table 2. Twisted-Pair Transceiver Control................................................................................................................ 6
Table 3. MII Interface ............................................................................................................................................... 6
Table 4. PHY Address Configuration....................................................................................................................... 7
Table 5. 100Base-X PCS Configuration................................................................................................................... 7
Table 6. Autonegotiation Configuration.................................................................................................................... 7
Table 7. LED and Status Outputs ............................................................................................................................ 8
Table 8. Clock and Chip Reset ................................................................................................................................ 9
Table 9. Power and Ground ..................................................................................................................................... 9
Table 10. Symbol Code Scrambler ........................................................................................................................ 13
Table 11. Autonegotiation ...................................................................................................................................... 20
Table 12. MII Management Registers.................................................................................................................... 20
Table 13. Control Register (Register 0h) ............................................................................................................... 21
Table 14. Status Register (Register 1h)................................................................................................................. 23
Table 15. PHY Identifier (Register 2h)................................................................................................................... 25
Table 16. PHY Identifier (Register 3h)................................................................................................................... 25
Table 17. Autonegotiation Advertisement (Register 4h) ........................................................................................ 25
Table 18. Autonegotiation Link Partner Ability (Register 5h) ................................................................................. 25
Table 19. Autonegotiation Expansion Register (Register 6h) ................................................................................ 26
Table 20. Receive Error Counter (Register 15h).................................................................................................... 26
Table 21. PHY Control/Status Register (Register 17h).......................................................................................... 27
Table 22. Config 100 Register (Register 18h)........................................................................................................ 28
Table 23. PHY Address Register (Register 19h) ................................................................................................... 29
Table 24. Config 10 Register (Register 1Ah)......................................................................................................... 29
Table 25. Status 100 Register (Register 1Bh) ....................................................................................................... 30
Table 26. Status 10 Register (Register 1Ch)......................................................................................................... 30
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