參數(shù)資料
型號: M12S128168A
廠商: Elite Semiconductor Memory Technology Inc.
英文描述: 2M x 16 Bit x 4 Banks Synchronous DRAM
中文描述: 200萬× 16位× 4個銀行同步DRAM
文件頁數(shù): 6/44頁
文件大?。?/td> 967K
代理商: M12S128168A
ES MT
AC OPERATING TEST CONDITIONS
(V
DD
= 2.5V
±
0.2V
,
T
A
= 0 to 70
C
M12S128168A
Elite Semiconductor Memory Technology Inc.
Revision
:
1.0
Publication Date
:
Nov. 2006
6/44
°
)
Parameter
Value
Unit
Input levels (Vih/Vil)
0.9xV
DDQ
/0.2
V
Input timing measurement reference level
0.5xV
DDQ
V
Input rise and fall-time
tr/tf = 1/1
ns
Output timing measurement reference level
0.5xV
DDQ
V
Output load condition
See Fig. 2
(Fig. 1) DC Output Load Circuit
(Fig. 2) AC Output Load Circuit
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Version
Parameter
Symbol
-10
Unit
Note
Row active to row active delay
t
RRD(min)
20
ns
1
RAS to CAS delay
Row precharge time
t
RCD(min)
30
ns
1
t
RP(min)
30
ns
1
t
RAS(min)
60
ns
1
Row active time
t
RAS(max)
100
us
@ Operating
t
RC(min)
90
ns
1
Row cycle time
@ Auto refresh t
RFC(min)
100
ns
1,5
Last data in to col. address delay
t
CDL(min)
1
t
CK
2
Last data in to row precharge
t
RDL(min)
2
t
CK
2
Last data in to burst stop
t
BDL(min)
1
t
CK
2
Refresh period (4,096 rows)
t
REF(max)
64
ms
6
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M12S128168A_08 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12S128168A-10BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12S128168A-10TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12S128168A-6BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM
M12S128168A-6TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Synchronous DRAM