參數(shù)資料
型號(hào): M2S56D30AKT-75
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 32M X 8 DDR DRAM, 0.75 ns, PDSO64
封裝: 0.40 MM PITCH, STSOP-64
文件頁(yè)數(shù): 27/41頁(yè)
文件大?。?/td> 638K
代理商: M2S56D30AKT-75
33
DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
256M Double Data Rate Synchronous DRAM
M2S56D20/ 30/ 40AKT
Burst read operation can be interrupted by a burst stop command(TERM). READ to TERM interval is 1 CLK
minimum. The time between TERM command to output disable is equal to the CAS Latency. As a result, READ
to TERM interval determines valid data length to be outputted. The figure below shows example of BL=8.
[Read Interrupted by Burst Stop]
Read Interrupted by TERM (BL=8)
CL=2.5
Command
DQS
Command
DQ
Command
DQ
Q0 Q1
Q2 Q3
Q0 Q1
/CLK
CLK
DQ
Q0 Q1
Q2 Q3 Q4 Q5
TERM
READ
TERM
READ TERM
DQS
CL=2.0
Command
DQS
Command
DQ
Command
DQ
Q0 Q1
Q2 Q3
Q0 Q1
DQ
Q0 Q1
Q2 Q3 Q4 Q5
TERM
READ
TERM
READ TERM
DQS
相關(guān)PDF資料
PDF描述
M2V56S30ATP-6 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
M30-6000206 2 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
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