參數(shù)資料
型號(hào): M2S56D30AKT-75
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 32M X 8 DDR DRAM, 0.75 ns, PDSO64
封裝: 0.40 MM PITCH, STSOP-64
文件頁數(shù): 40/41頁
文件大?。?/td> 638K
代理商: M2S56D30AKT-75
8
DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
256M Double Data Rate Synchronous DRAM
M2S56D20/ 30/ 40AKT
COMMAND TRUTH TABLE
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
NOTE:
1. Applies only to read bursts while autoprecharge is disabled; this command is undefined (and should not be
used) during read bursts while autoprecharge is enabled, as well as during write bursts.
2. BA0-BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode
Register;BA0=1 ,BA1 = 0 selects Extended Mode Register; other combinations of BA0-BA1 are
reserved; A0-A12 provide the op-codes to be written to the selected Mode Register.
COMMAND
MNEMONIC
CKE
n-1
CKE
n
/CS
/RAS /CAS /WE BA0,1
A10
/AP
A0-9,
11-12
Deselect
DESEL
H
X
H
X
No Operation
NOP
H
X
L
H
X
Row Address Entry &
Bank Activate
ACT
H
L
H
V
Single Bank Precharge
PRE
H
L
H
L
V
L
X
Precharge All Banks
PREA
H
L
H
L
H
X
Column Address Entry
& Write
WRITE
H
L
H
L
V
L
V
Column Address Entry
& Write with
Auto-Precharge
WRITEA
H
L
H
L
V
H
V
Column Address Entry
& Read
READ
H
L
H
L
H
V
L
V
Column Address Entry
& Read with
Auto-Precharge
READA
H
HL
H
L
H
V
HV
Auto-Refresh
REFA
H
L
H
X
Self-Refresh Entry
REFS
H
L
H
X
Self-Refresh Exit
REFSX
LH
H
X
LH
L
H
X
Burst Terminate
TERM
HH
L
HH
L
X
XX
Mode Register Set
MRS
H
L
V
X
Note
1
2
相關(guān)PDF資料
PDF描述
M2V56S30ATP-6 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
M30-6000206 2 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
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