參數(shù)資料
型號(hào): M2S56D30AKT-75
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 32M X 8 DDR DRAM, 0.75 ns, PDSO64
封裝: 0.40 MM PITCH, STSOP-64
文件頁數(shù): 7/41頁
文件大?。?/td> 638K
代理商: M2S56D30AKT-75
15
DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
256M Double Data Rate Synchronous DRAM
M2S56D20/ 30/ 40AKT
POWER ON SEQUENCE
The following power on sequences are necessary to guarantee the proper operations of the DDR SDRAM.
1. Apply VDD before or at the same time as VDDQ
2. Apply VDDQ before or at the same time as VTT & VREF
3. Maintain stable conditions for 200us after stable power and CLK are applied, assert NOP or DSEL
4. Issue Precharge command for all banks of the device
5. Issue EMRS to program proper functions
6. Issue MRS to configure the Mode Register and to reset the DLL
7. Issue 2 or more Auto Refresh commands
8. Maintain stable conditions for 200 cycle
After these sequences, the DDR SDRAM is in the idle state and ready for normal operation.
MODE REGISTER
Burst Length, Burst Type and /CAS Latency can be programmed by
configuring the mode register (MRS). The mode register stores these data
until the next MRS command, which may be issued when both banks are in
idle state. After tMRD from an MRS command, the DDR SDRAM is ready to
accept the new command.
/CS
/RAS
/CAS
/WE
A11-A0
/CLK
CLK
BA0
BA1
R: Reserved for Future Use
0NO
1YES
DLL Reset
0
Sequential
1
Interleaved
Burst Type
BT=0
BT=1
00 0
R
00 1
2
01 0
4
01 1
8
10 0
R
10 1
R
11 0
R
11 1
R
BL
Burst
Length
/CAS Latency
00 0
R
00 1
R
01 0
2
01 1
R
10 0
R
10 1
R
11 0
2.5
11 1
R
CL
Latency
Mode
BA1 BA0 A12 A11 A10 A9 A8A7A6A5A4A3A2 A1A0
00
000
0
DR
0
BT
LTMODE
BL
V
相關(guān)PDF資料
PDF描述
M2V56S30ATP-6 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
M30-6000206 2 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6000406 4 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6001106 11 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6011006 20 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
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