參數(shù)資料
型號: M2S56D30AKT-75
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 32M X 8 DDR DRAM, 0.75 ns, PDSO64
封裝: 0.40 MM PITCH, STSOP-64
文件頁數(shù): 41/41頁
文件大?。?/td> 638K
代理商: M2S56D30AKT-75
9
DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
256M Double Data Rate Synchronous DRAM
M2S56D20/ 30/ 40AKT
FUNCTION TRUTH TABLE (1/4)
Current State /CS /RAS /CAS /WE Address
Command
Action
Notes
IDLE
H
X
X X
DESEL
NOP
LH
H
H X
NOP
L
H
L BA
TERM
ILLEGAL
2
L
H
L
X BA, CA, A10
READ / WRITE
ILLEGAL
2
L
H
H BA, RA
ACT
Bank Active, Latch RA
L
H
L BA, A10
PRE / PREA
NOP
4
L
H X
REFA
Auto-Refresh
5
LL
L
Op-Code,
Mode-Add
MRS
Mode Register Set
5
ROW ACTIVE H
X
X X
DESEL
NOP
LH
H
H X
NOP
LH
H
L BA
TERM
NOP
L
H
L
H BA, CA, A10
READ / READA
Begin Read, Latch CA,
Determine Auto-Precharge
L
H
L
L BA, CA, A10
WRITE / WRITEA
Begin Write, Latch CA,
Determine Auto-Precharge
L
H
H BA, RA
ACT
Bank Active / ILLEGAL
2
L
H
L BA, A10
PRE / PREA
Precharge / Precharge All
L
H X
REFA
ILLEGAL
LL
L
Op-Code,
Mode-Add
MRS
ILLEGAL
H
X
X X
DESEL
NOP (Continue Burst to END)
L
H
H X
NOP
NOP (Continue Burst to END)
L
H
L BA
TERM
Terminate Burst
L
H
L
H BA, CA, A10
READ / READA
Terminate Burst, Latch CA, Begin
New Read, Determine Auto-
Precharge
3
L
H
L
L BA, CA, A10
WRITE / WRITEA ILLEGAL
L
H
H BA, RA
ACT
Bank Active / ILLEGAL
2
L
H
L BA, A10
PRE / PREA
Terminate Burst, Precharge
L
H X
REFA
ILLEGAL
LL
L
Op-Code,
Mode-Add
MRS
ILLEGAL
READ(Auto-
Precharge
Disabled)
相關(guān)PDF資料
PDF描述
M2V56S30ATP-6 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
M30-6000206 2 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
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