Clock asynchronous serial I/O (UART) mode
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Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
140
Item
Specification
Transfer data format
Character bit (transfer data): 7 bits, 8 bits, or 9 bits as selected
Start bit: 1 bit
Parity bit: Odd, even, or nothing as selected
Stop bit: 1 bit or 2 bits as selected
When internal clock is selected (bit 3 at addresses 0360
16
, 0368
16
, 0338
16
, 0328
16
,
02F8
16
= “0”) : fi/16(n+1) (Note 1)
fi = f
1
, f
8
, f
32
When external clock is selected (bit 3 at addresses 0360
16
, 0368
16
, 0338
16
, 0328
16
,
02F8
16
=“1”) : f
EXT
/16(n+1)(Note 1) (Note 2)
CTS function/RTS function/CTS, RTS function chosen to be invalid
To start transmission, the following requirements must be met:
- Transmit enable bit (bit 0 at addresses 0365
16
, 036D
16
, 033D
16
, 032D
16
,
02FD
16
) = “1”
- Transmit buffer empty flag (bit 1 at addresses 0365
16
, 036D
16
, 033D
16
,
032D
16
16
) = “0”
- When CTS function selected, CTS input level = “L”
- TxD output is selected by the corresponding port function select register,
peripheral function select register and peripheral subfunction select
register.
To start reception, the following requirements must be met:
- Receive enable bit (bit 2 at addresses 0365
16
, 036D
16
, 033D
16
, 032D
16
,
02FD
16
) = “1”
- Start bit detection
When transmitting
- Transmit interrupt cause select bits (bits 0,1 at address 0370
16
, bit 4 at
address 033D
16
, 032D
16
, 02FD
16
) = “0”: Interrupts requested when data transfer
from UARTi transfer buffer register to UARTi transmit register is completed
- Transmit interrupt cause select bits (bits 0, 1 at address 0370
16
, bit 4 at
address 033D
16
, 032D
16
, 02FD
16
) = “1”: Interrupts requested when data
transmission from UARTi transfer register is completed
When receiving
- Interrupts requested when data transfer from UARTi receive register to
UARTi receive buffer register is completed
Transfer clock
Transmission/reception control
Transmission start condition
Reception start condition
Interrupt request
generation timing
(2) Clock asynchronous serial I/O (UART) mode
The UART mode allows transmitting and receiving data after setting the desired transfer rate and transfer
data format. Tables 1.18.1 and 1.18.2 list the specifications of the UART mode. Figure 1.18.1 shows the
UARTi transmit/receive mode register.
Table 1.18.1. Specifications of UART Mode (1)
Note 1: ‘n’ denotes the value 00
16
to FF
16
that is set to the UARTi bit rate generator.
Note 2: fEXT is input from the CLKi pin.