deveopmen
DMAC
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C/80 (100-pin version) group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
82
Figure 1.11.5. DMAC register (4)
b23
b0
Function
R W
Memory address (Note 2)
Set source or destination memory address
Symbol
DMA0
DMA1
DMA2 (bank 1 A0) (Note 1)
DMA3 (bank 1 A1) (Note 1)
Address
XXXXXX
16
XXXXXX
16
000000
16
000000
16
DMAi memory address register (i = 0, 1)
(CPU internal register)
Transfer count
specification
000000
16
to FFFFFF
16
(16 Mbytes area)
AA
Note 1: When setting DMA2 and DMA3, set "1" to the register bank select flag (B flag) of
flag register (FLG), and set desired value to A0 and A1 of register bank 1.
Note 2: When the transfer direction select bit is "0" (fixed address to memory), this register
is destination memory address.
When the transfer direction select bit is "1" (memory to fixed address), this register
is source memory address.
b0
Function
R W
A
SFR address (Note 2)
Set source or destination fixed address
Symbol
DSA0
DSA1
DSA2 (bank 1 SB) (Note 1)
DSA3 (bank 1 FB) (Note 1)
Address
XXXXXX
16
XXXXXX
16
000000
16
000000
16
DMAi SFR address register (i = 0 to 3)
(CPU internal register)
Transfer count
specification
000000
16
to FFFFFF
16
(16 Mbytes area)
A
A
A
Note 1: When setting DSA2, set "1" to the register bank select flag (B flag) of flag register
(FLG), and set desired value to SB of register bank 1.
When setting DSA3, set "1" to the register bank select flag (B flag) of flag register
(FLG), and set desired value to FB of register bank 1.
Note 2: When the transfer direction select bit is "0" (fixed address to memory), this register
is destination fixed address.
When the transfer direction select bit is "1" (memory to fixed address), this register
is source fixed address.
b0
Function
R W
Memory address register reload value
Set source or destination memory address
Symbol
DRA0
DRA1
DRA2 (SVP) (Note)
DRA3 (VCT) (Note)
Address
XXXXXX
16
XXXXXX
16
XXXXXX
16
XXXXXX
16
DMAi memory address reload register (i = 0, 1)
(CPU internal register)
Transfer count
specification
000000
16
to FFFFFF
16
(16 Mbytes area)
AA
Note: When setting DRA2, set desired value to save PC register (SVP).
When setting DRA3, set desired value to vector register (VCT).
b23
b23