參數(shù)資料
型號: M58WR064KU70ZA6U
廠商: NUMONYX
元件分類: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44
封裝: 7.50 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFBGA-44
文件頁數(shù): 92/122頁
文件大?。?/td> 2187K
代理商: M58WR064KU70ZA6U
M58WRxxxKU, M58WRxxxKL
DC and AC parameters
2.
Sampled only, not 100% tested.
Table 26.
Write AC characteristics, Write Enable controlled
Symbol
Alt
Parameter
70
Unit
Wr
ite
En
ab
le
C
ontrolle
d
Timin
g
s
tAVAV
tWC
Address Valid to Next Address Valid
Min
70
ns
tAVLH
Address Valid to Latch Enable High
Min
7
ns
tDVWH
tDS
Data Valid to Write Enable High
Min
40
ns
tELLH
Chip Enable Low to Latch Enable High
Min
10
ns
tELWL
tCS
Chip Enable Low to Write Enable Low
Min
0
ns
tELQV
Chip Enable Low to Output Valid
Min
70
ns
tGHLL
Output Enable High to Latch Enable Low
Min
20
ns
tGHWL
Output Enable High to Write Enable Low
Min
20
ns
tLHAX
Latch Enable High to Address Transition
Min
7
ns
tLHGL
Latch Enable High to Output Enable Low
Min
5
ns
tLLLH
Latch Enable Pulse Width
Min
7
ns
tWHDX
tDH
Write Enable High to Input Transition
Min
0
ns
tWHEH
tCH
Write Enable High to Chip Enable High
Min
0
ns
tWHEL
(1)
1.
tWHEL and tWHLL have this value when reading from the targeted bank or when reading from
any address after a Set Configuration Register command has been issued. System designers
should take this into account and may insert a software No-Op instruction to delay the first read
in the same bank after issuing any command, or to delay the first read to any address after
issuing a Set Configuration Register command. If the first read after the command is a Read
Array operation in a different bank and no changes to the configuration register have been
issued, tWHEL and tWHLL are 0 ns.
Write Enable High to Chip Enable Low
Min
25
ns
tWHGL
Write Enable High to Output Enable Low
Min
0
ns
tWHLL
Write Enable High to Latch Enable Low
Min
25
ns
tWHWL
tWPH
Write Enable High to Write Enable Low
Min
25
ns
tWLWH
tWP
Write Enable Low to Write Enable High
Min
45
ns
P
rot
ec
ti
on
T
imi
ng
s
tQVVPL
Output (status register) Valid to VPP Low
Min
0
ns
tQVWPL
Output (status register) Valid to Write
Protect Low
Min
0
ns
tVPHWH
tVPS
VPP High to Write Enable High
Min
200
ns
tWHVPL
Write Enable High to VPP Low
Min
200
ns
tWHWPL
Write Enable High to Write Protect Low
Min
200
ns
tWPHWH
Write Protect High to Write Enable High
Min
200
ns
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