參數(shù)資料
型號(hào)： M58WR064KU70ZA6U
廠商： NUMONYX
元件分類： PROM
英文描述： 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44
封裝： 7.50 X 5 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFBGA-44
文件頁數(shù)： 94/122頁
文件大小： 2187K
代理商： M58WR064KU70ZA6U
M58WRxxxKU, M58WRxxxKL
DC and AC parameters
1.
Sampled only, not 100% tested.
2.
tWHEL has this value when reading from the targeted bank or when reading from any address after a Set
Configuration Register command has been issued. System designers should take this into account and
may insert a software No-Op instruction to delay the first read in the same bank after issuing any
command, or to delay the first read to any address after issuing a Set Configuration Register command. If
the first read after the command is a Read Array operation in a different bank and no changes to the
configuration register have been issued, tWHEL is 0 ns.
Table 27.
Write AC characteristics, Chip Enable controlled
Symbol
Alt
Parameter
70
Unit
Chip
Ena
b
le
Co
ntro
lle
d
Timin
g
s
tAVAV
tWC Address Valid to Next Address Valid
Min
70
ns
tAVLH
Address Valid to Latch Enable High
Min
7
ns
tDVEH
tDS Data Valid to Chip Enable High
Min
40
ns
tEHDX
tDH Chip Enable High to Input Transition
Min
0
ns
tEHEL
tWPH Chip Enable High to Chip Enable Low
Min
25
ns
tEHLL
Chip Enable High to Latch Enable Low
Min
0
ns
tEHWH
tCH Chip Enable High to Write Enable High
Min
0
ns
tELEH
tWP Chip Enable Low to Chip Enable High
Min
45
ns
tELLH
Chip Enable Low to Latch Enable High
Min
10
ns
tELQV
Chip Enable Low to Output Valid
Min
70
ns
tGHEL
Output Enable High to Chip Enable Low
Min
20
ns
tGHLL
Output Enable High to Latch Enable Low
Min
20
ns
tLHAX
Latch Enable High to Address Transition
Min
7
ns
tLHGL
Latch Enable High to Output Enable Low
Min
5
ns
tLLLH
Latch Enable Pulse Width
Min
7
ns
tWHEL
(2)
Write Enable High to Chip Enable Low
Min
25
ns
tWLEL
tCS Write Enable Low to Chip Enable Low
Min
0
ns
P
rot
ec
ti
on
T
imi
ng
s
tEHVPL
Chip Enable High to VPP Low
Min
200
ns
tEHWPL
Chip Enable High to Write Protect Low
Min
200
ns
tQVVPL
Output (status register) Valid to VPP Low
Min
0
ns
tQVWPL
Output (status register) Valid to Write Protect Low
Min
0
ns
tVPHEH
tVPS VPP High to Chip Enable High
Min
200
ns
tWPHEH
Write Protect High to Chip Enable High
Min
200
ns
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