SPI/I2C UART with 128-Word FIFOs in WLP MAX3108 7 Maxim Integrated DC ELECTRICAL" />
參數(shù)資料
型號(hào): MAX3108EWA+T
廠商: Maxim Integrated Products
文件頁數(shù): 54/56頁
文件大?。?/td> 0K
描述: IC UART
產(chǎn)品培訓(xùn)模塊: Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
系列: *
SPI/I2C UART with 128-Word FIFOs in WLP
MAX3108
7
Maxim Integrated
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 1.71V to 3.6V, VL = 1.71V to 3.6V, VEXT = 1.71V to 3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at
VCC = 2.8V, VL = 1.8V, VEXT = 2.5V, TA = +25NC.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V18 Input Power-Supply Current
I18
Baud rate = 1Mbps, 20MHz external clock,
PLL disabled, UART in loopback mode,
LDOEN = low (Note 4)
2
mA
SCLK/SCL, MISO/SDA
MISO/SDA Output Logic-Low
Voltage in I2C Mode
VOLI2C
Sink current = 3mA, VL > 2V
0.4
V
Sink current = 3mA, VL < 2V
0.2 x
VL
MISO/SDA Output Logic-Low
Voltage in SPI Mode
VOLSPI
Sink current = 2mA
0.4
V
MISO/SDA Output Logic-High
Voltage in SPI Mode
VOHSPI
Source current = 2mA
VL -
0.4
V
Input Logic-Low Voltage
VIL
SPI and I2C mode
0.3 x
VL
V
Input Logic-High Voltage
VIH
SPI and I2C mode
0.7 x
VL
V
Input Hysteresis
VHYST
SPI and I2C mode
0.05 x
VL
V
Input Leakage Current
IIL
VIN = 0 to VL, SPI and I2C mode
-1
+1
F
A
Input Capacitance
CIN
SPI and I2C mode
5
pF
SPI/I2C, CS/A0, MOSI/A1 INPUTS
Input Logic-Low Voltage
VIL
SPI and I2C mode
0.3 x
VL
V
Input Logic-High Voltage
VIH
SPI and I2C mode
0.7 x
VL
V
Input Hysteresis
VHYST
SPI and I2C mode
50
mV
Input Leakage Current
IIL
VIN = 0 to VL, SPI and I2C mode
-1
+1
F
A
Input Capacitance
CIN
SPI and I2C mode
5
pF
IRQ OUTPUT (OPEN DRAIN)
Output Logic-Low Voltage
VOL
Sink current = 2mA
0.4
V
Output Leakage Current
IOL
VIRQ = 0 to VL, IRQ is not asserted
-1
+1
F
A
LDOEN AND RST INPUTS
Input Logic-Low Voltage
VIL
0.3 x
VL
V
Input Logic-High Voltage
VIH
0.7 x
VL
V
Input Hysteresis
VHYST
50
mV
Input Leakage Current
IIL
VIN = 0 to VL
-1
+1
F
A
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