Table of Contents
Paragraph
Number
Title
Page
Number
MOTOROLA
MC68302 USER’S MANUAL
xiii
D.3.2
D.3.3
D.3.4
D.3.5
D.3.6
D.3.7
D.3.8
D.4
D.4.1
D.4.2
D.4.3
D.4.4
D.4.5
D.5
D.5.1
D.5.2
D.5.3
D.5.4
D.5.5
D.5.6
D.5.7
D.5.8
D.6
MC68302 Buffer Processing ...................................................................D-8
New Pointers...........................................................................................D-9
Initial Conditions....................................................................................D-10
Transmit Algorithm................................................................................D-10
Interrupt Routine....................................................................................D-10
Final Comments....................................................................................D-11
HDLC Code Listing................................................................................D-11
Configuring A Uart on the MC68302.....................................................D-17
Purpose of the Code .............................................................................D-17
Organization of Buffers..........................................................................D-18
Assumptions about the System.............................................................D-19
UART Features Not Discussed.............................................................D-19
UART Code Listing................................................................................D-19
Independent DMA in the MC68302.......................................................D-23
IDMA Overview .....................................................................................D-23
IDMA Software Initialization ..................................................................D-24
IDMA Bus Arbitration Signals................................................................D-24
Triggering External IDMA Transfers......................................................D-24
Performing Internally Generated IDMA Transfers.................................D-24
External Cycles Examples.....................................................................D-26
Internal Interrupt Sequence...................................................................D-29
Final Notes............................................................................................D-30
MC68302 Multiprotocol Controller Tied to IDL Bus Forms and
ISDN Voice/data Terminal.....................................................................D-30
M68000 Core.........................................................................................D-31
Communications Processor ..................................................................D-31
System Integration Block.......................................................................D-31
IDL Bus..................................................................................................D-31
IDL Bus Specification............................................................................D-32
IMP/IDL Interconnection........................................................................D-33
Serial Interface Configuration................................................................D-35
SCC Configuration ................................................................................D-36
Parallel l/O Port A Configuration ...........................................................D-37
SCP Bus................................................................................................D-37
SCP Configuration.................................................................................D-38
SCP Data Transactions.........................................................................D-38
Additional IMP To S/T Chip Connections..............................................D-39
Initialization of the MC145475...............................................................D-40
MC145554 CODEC Filter......................................................................D-41
Interfacing a Master MC68302 to One or More Slave MC68302s ........D-41
Synchronous vs. Asynchronous Accesses............................................D-43
Clocking.................................................................................................D-43
Programming the Base Address Registers (BARs)...............................D-43
Dealing with Interrupts...........................................................................D-44
Arbitration..............................................................................................D-44
D.6.1
D.6.2
D.6.3
D.6.4
D.6.5
D.6.6
D.6.7
D.6.8
D.6.9
D.6.10
D.6.11
D.6.12
D.6.13
D.6.14
D.6.15
D.7
D.7.1
D.7.2
D.7.3
D.7.4
D.7.5