MC68302 Applications
MOTOROLA
MC68302 USER’S MANUAL
D-65
stream with the L bit in all Tx BDs cleared, then the byte alignment timing will remain con-
stant.
D.8.11 Initializing Transparent Mode
Full examples of the assembler code required to initialize the HDLC and UART protocols are
given in D.3 MC68302 Buffer Processing and Interrupt Handling and D.4 Configuring A Uart
on the MC68302.
A transparent mode initialization follows the same flow as these subsec-
tions except that different values would be used. The HDLC and UART examples also show
writing of the BAR and full configuration of the interrupt controller to allow SCC interrupts,
etc., which are not duplicated here.
The following example shows a step-by-step list of the SCC-related registers as they would
be initialized to create a transparent SCC2 channel in the NMSI mode. The registers in this
example are configured for external loopback with TCLK2 externally connected to RCLK2,
TXD2 externally connected to RXD2, CTS2 a don't care, and RTS2 externally connected to
CD2 (sync). The functionality of this configuration is the same as that shown in Figure D-28.
This example may be easily checked on the ADS302 board, either with the menu interface
software already on the ADS302 board or with user-written software downloaded to the
ADS302 board. The external connections can be made by placing three jumper cables on
row B of the serial bus connector P8: B5-to-B6, B7-to-B8, and B10-to-B11.
1. To use SCC2 in the NMSI mode, we need to chose NMSI2 pins instead of parallel l/O
pins. To do this, we write a one to the PACNT register in every bit position that we want
an SCC pin to be active. For this example, we will assume all seven NMSI2 pins are
active.
PACNT = $xx7F
2. The SIMODE register is set to its default setting. This configuration chooses NMSI
mode on all three SCCs. Actually, all we need is that NMSI mode be selected for
SCC2.
SIMODE = $0000
3. The SCON register configures the clocking options. Here we chose to generate about
a 65-kHz clock on the TCLK2 pin with the internal baud rate generator. RCLK2 will
take its input externally; thus, we connect the TCLK2 pin externally to RCLK2. SCON2
= $1200
4. The setting shown for SCM2 sets the EXSYN and NTSYN bits, sets the
DIAG1-DIAG0 bits for software operation, and sets the protocol to BISYNC (which is
actually transparent since the NTSYN bit is set).
Since we are implementing an external loopback with the MC68302, the
DIAG1-DIAG0 bits are not setfor loopback mode. Setting the DIAG1-DIAG0 bits for
loopback mode causes internal oopback. (To implement an internal loopback, exter-
nally connect only RTS2 to CD2 (sync), set SCON2 to $0200, and SCM2 to $6013.
Later, the very last step is to set SCM2 to $601 F. With internal loopback, RCLK and
TCLK should be directly supplied with the same clock source—either both from the in-
ternal baud rate generators or both from the same externally generated clock source.)
SCM2 = $6033
5. The DSR2 does not need to be written and can be left at its default value since we are